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AVR

Instruction Set Manual

AVR

Instruction Set Manual

Introduction

This manual gives an overview and explanation of every instruction available for 8-bit AVR

devices. Each instruction

has its own section containing functional description, it’s opcode, and syntax, the end state of the status register, and

cycle times.

The manual also contains an explanation of the different addressing modes used by AVR devices and an appendix

listing all modern AVR devices and what instruction it has available.

Manual

DS40002198A-page 1

Table of Contents

Introduction.....................................................................................................................................................1

1. Instruction Set Nomenclature..................................................................................................................6

2. CPU Registers Located in the I/O Space................................................................................................8

2.1. RAMPX, RAMPY, and RAMPZ.....................................................................................................8

2.2. RAMPD........................................................................................................................................ 8

2.3. EIND.............................................................................................................................................8

3. The Program and Data Addressing Modes.............................................................................................9

3.1. Register Direct, Single Register Rd..............................................................................................9

3.2. Register Direct - Two Registers, Rd and Rr................................................................................. 9

3.3. I/O Direct.................................................................................................................................... 10

3.4. Data Direct................................................................................................................................. 10

3.5. Data Indirect............................................................................................................................... 11

3.6. Data Indirect with Pre-decrement............................................................................................... 11

3.7. Data Indirect with Post-increment.............................................................................................. 12

3.8. Data Indirect with Displacement.................................................................................................12

3.9. Program Memory Constant Addressing using the LPM, ELPM, and SPM Instructions............. 13

3.10. Program Memory with Post-increment using the LPM Z+ and ELPM Z+ Instruction................. 13

3.11. Store Program Memory Post-increment.....................................................................................14

3.12. Direct Program Addressing, JMP and CALL.............................................................................. 14

3.13. Indirect Program Addressing, IJMP and ICALL..........................................................................15

3.14. Extended Indirect Program Addressing, EIJMP and EICALL.....................................................15

3.15. Relative Program Addressing, RJMP and RCALL..................................................................... 16

4. Instruction Set Summary.......................................................................................................................17

5. Instruction Description...........................................................................................................................23

5.1. ADC – Add with Carry................................................................................................................ 23

5.2. ADD – Add without Carry........................................................................................................... 24

5.3. ADIW – Add Immediate to Word................................................................................................ 25

5.4. AND – Logical AND....................................................................................................................26

5.5. ANDI – Logical AND with Immediate..........................................................................................27

5.6. ASR – Arithmetic Shift Right...................................................................................................... 28

5.7. BCLR – Bit Clear in SREG......................................................................................................... 29

5.8. BLD – Bit Load from the T Bit in SREG to a Bit in Register....................................................... 30

5.9. BRBC – Branch if Bit in SREG is Cleared..................................................................................31

5.10. BRBS – Branch if Bit in SREG is Set......................................................................................... 32

5.11. BRCC – Branch if Carry Cleared................................................................................................33

5.12. BRCS – Branch if Carry Set....................................................................................................... 34

5.13. BREAK – Break..........................................................................................................................35

5.14. BREQ – Branch if Equal.............................................................................................................35

5.15. BRGE – Branch if Greater or Equal (Signed).............................................................................36

5.16. BRHC – Branch if Half Carry Flag is Cleared.............................................................................37

5.17. BRHS – Branch if Half Carry Flag is Set.................................................................................... 38

5.18. BRID – Branch if Global Interrupt is Disabled............................................................................ 39

AVR

Instruction Set Manual

Manual

DS40002198A-page 2

5.19. BRIE – Branch if Global Interrupt is Enabled............................................................................. 40

5.20. BRLO – Branch if Lower (Unsigned).......................................................................................... 41

5.21. BRLT – Branch if Less Than (Signed)........................................................................................42

5.22. BRMI – Branch if Minus..............................................................................................................43

5.23. BRNE – Branch if Not Equal...................................................................................................... 44

5.24. BRPL – Branch if Plus................................................................................................................45

5.25. BRSH – Branch if Same or Higher (Unsigned).......................................................................... 46

5.26. BRTC – Branch if the T Bit is Cleared........................................................................................47

5.27. BRTS – Branch if the T Bit is Set............................................................................................... 48

5.28. BRVC – Branch if Overflow Cleared.......................................................................................... 49

5.29. BRVS – Branch if Overflow Set..................................................................................................50

5.30. BSET – Bit Set in SREG............................................................................................................ 51

5.31. BST – Bit Store from Bit in Register to T Bit in SREG................................................................52

5.32. CALL – Long Call to a Subroutine..............................................................................................53

5.33. CBI – Clear Bit in I/O Register....................................................................................................54

5.34. CBR – Clear Bits in Register...................................................................................................... 54

5.35. CLC – Clear Carry Flag..............................................................................................................55

5.36. CLH – Clear Half Carry Flag...................................................................................................... 56

5.37. CLI – Clear Global Interrupt Enable Bit...................................................................................... 57

5.38. CLN – Clear Negative Flag........................................................................................................ 58

5.39. CLR – Clear Register................................................................................................................. 59

5.40. CLS – Clear Sign Flag................................................................................................................60

5.41. CLT – Clear T Bit........................................................................................................................60

5.42. CLV – Clear Overflow Flag.........................................................................................................61

5.43. CLZ – Clear Zero Flag................................................................................................................62

5.44. COM – One’s Complement........................................................................................................ 63

5.45. CP – Compare............................................................................................................................64

5.46. CPC – Compare with Carry........................................................................................................65

5.47. CPI – Compare with Immediate................................................................................................. 66

5.48. CPSE – Compare Skip if Equal..................................................................................................67

5.49. DEC – Decrement...................................................................................................................... 68

5.50. DES – Data Encryption Standard...............................................................................................69

5.51. EICALL – Extended Indirect Call to Subroutine......................................................................... 70

5.52. EIJMP – Extended Indirect Jump............................................................................................... 71

5.53. ELPM – Extended Load Program Memory.................................................................................72

5.54. EOR – Exclusive OR.................................................................................................................. 73

5.55. FMUL – Fractional Multiply Unsigned........................................................................................ 74

5.56. FMULS – Fractional Multiply Signed.......................................................................................... 76

5.57. FMULSU – Fractional Multiply Signed with Unsigned................................................................77

5.58. ICALL – Indirect Call to Subroutine............................................................................................ 78

5.59. IJMP – Indirect Jump..................................................................................................................79

5.60. IN - Load an I/O Location to Register.........................................................................................80

5.61. INC – Increment......................................................................................................................... 81

5.62. JMP – Jump............................................................................................................................... 82

5.63. LAC – Load and Clear................................................................................................................83

5.64. LAS – Load and Set................................................................................................................... 84

5.65. LAT – Load and Toggle.............................................................................................................. 84

5.66. LD – Load Indirect from Data Space to Register using X...........................................................85

AVR

Instruction Set Manual

Manual

DS40002198A-page 3

5.67. LD (LDD) – Load Indirect from Data Space to Register using Y................................................ 87

5.68. LD (LDD) – Load Indirect From Data Space to Register using Z............................................... 88

5.69. LDI – Load Immediate................................................................................................................ 90

5.70. LDS – Load Direct from Data Space.......................................................................................... 91

5.71. LDS (AVRrc) – Load Direct from Data Space............................................................................ 92

5.72. LPM – Load Program Memory................................................................................................... 93

5.73. LSL – Logical Shift Left.............................................................................................................. 94

5.74. LSR – Logical Shift Right........................................................................................................... 95

5.75. MOV – Copy Register................................................................................................................ 96

5.76. MOVW – Copy Register Word................................................................................................... 97

5.77. MUL – Multiply Unsigned........................................................................................................... 98

5.78. MULS – Multiply Signed............................................................................................................. 99

5.79. MULSU – Multiply Signed with Unsigned.................................................................................100

5.80. NEG – Two’s Complement....................................................................................................... 101

5.81. NOP – No Operation................................................................................................................ 102

5.82. OR – Logical OR...................................................................................................................... 103

5.83. ORI – Logical OR with Immediate............................................................................................ 104

5.84. OUT – Store Register to I/O Location...................................................................................... 105

5.85. POP – Pop Register from Stack...............................................................................................106

5.86. PUSH – Push Register on Stack..............................................................................................107

5.87. RCALL – Relative Call to Subroutine....................................................................................... 108

5.88. RET – Return from Subroutine.................................................................................................109

5.89. RETI – Return from Interrupt.................................................................................................... 110

5.90. RJMP – Relative Jump............................................................................................................. 111

5.91. ROL – Rotate Left trough Carry................................................................................................112

5.92. ROR – Rotate Right through Carry...........................................................................................113

5.93. SBC – Subtract with Carry........................................................................................................114

5.94. SBCI – Subtract Immediate with Carry SBI – Set Bit in I/O Register....................................... 115

5.95. SBI – Set Bit in I/O Register..................................................................................................... 116

5.96. SBIC – Skip if Bit in I/O Register is Cleared............................................................................. 117

5.97. SBIS – Skip if Bit in I/O Register is Set.................................................................................... 118

5.98. SBIW – Subtract Immediate from Word....................................................................................119

5.99. SBR – Set Bits in Register....................................................................................................... 120

5.100. SBRC – Skip if Bit in Register is Cleared.................................................................................121

5.101. SBRS – Skip if Bit in Register is Set........................................................................................ 122

5.102. SEC – Set Carry Flag...............................................................................................................123

5.103. SEH – Set Half Carry Flag....................................................................................................... 124

5.104. SEI – Set Global Interrupt Enable Bit.......................................................................................124

5.105. SEN – Set Negative Flag......................................................................................................... 125

5.106. SER – Set all Bits in Register...................................................................................................126

5.107. SES – Set Sign Flag................................................................................................................ 127

5.108. SET – Set T Bit........................................................................................................................ 128

5.109. SEV – Set Overflow Flag......................................................................................................... 128

5.110. SEZ – Set Zero Flag.................................................................................................................129

5.111. SLEEP......................................................................................................................................130

5.112. SPM – Store Program Memory................................................................................................ 131

5.113. SPM (AVRxm, AVRxt) – Store Program Memory..................................................................... 133

5.114. ST – Store Indirect From Register to Data Space using Index X.............................................134

AVR

Instruction Set Manual

Manual

DS40002198A-page 4

5.115. ST (STD) – Store Indirect From Register to Data Space using Index Y.................................. 135

5.116. ST (STD) – Store Indirect From Register to Data Space using Index Z...................................137

5.117. STS – Store Direct to Data Space............................................................................................139

5.118. STS (AVRrc) – Store Direct to Data Space.............................................................................. 140

5.119. SUB – Subtract Without Carry..................................................................................................141

5.120. SUBI – Subtract Immediate......................................................................................................142

5.121. SWAP – Swap Nibbles.............................................................................................................143

5.122. TST – Test for Zero or Minus................................................................................................... 144

5.123. WDR – Watchdog Reset.......................................................................................................... 145

5.124. XCH – Exchange......................................................................................................................145

6. Appendix A Device Core Overview..................................................................................................... 147

6.1. Core Descriptions.....................................................................................................................147

6.2. Device Tables........................................................................................................................... 148

7. Data Sheet Revision History............................................................................................................... 158

7.1. Rev. DS40002198A - 05/2020..................................................................................................158

7.2. Rev.0856L - 11/2016................................................................................................................ 158

7.3. Rev.0856K - 04/2016................................................................................................................158

7.4. Rev.0856J - 07/2014................................................................................................................ 158

7.5. Rev.0856I – 07/2010................................................................................................................ 158

7.6. Rev.0856H – 04/2009...............................................................................................................158

7.7. Rev.0856G – 07/2008.............................................................................................................. 159

7.8. Rev.0856F – 05/2008............................................................................................................... 159

The Microchip Website...............................................................................................................................160

Product Change Notification Service..........................................................................................................160

Customer Support...................................................................................................................................... 160

Microchip Devices Code Protection Feature.............................................................................................. 160

Legal Notice............................................................................................................................................... 160

Trademarks................................................................................................................................................ 161

Quality Management System..................................................................................................................... 161

Worldwide Sales and Service.....................................................................................................................162

AVR

Instruction Set Manual

Manual

DS40002198A-page 5