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首页三星(SAMSUNG)EMMC 产品规格书
三星(SAMSUNG)EMMC 产品规格书
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更新于2023-03-16
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三星EMMC规格书,支持eMMC5.1规范。8GB/16GB/32GB/64GB容量。
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SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
SPECIFICATIONS WITHOUT NOTICE.
Products and specifications discussed herein are for reference purposes only. All information discussed
herein is provided on an "AS IS" basis, without warranties of any kind.
This document and all information discussed herein remain the sole and exclusive property of Samsung
Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property
right is granted by one party to the other party under this document, by implication, estoppel or other-
wise.
Samsung products are not intended for use in life support, critical care, medical, safety equipment, or
similar applications where product failure could result in loss of life or personal or physical harm, or any
military or defense application, or any governmental procurement to which special terms or provisions
may apply.
For updates or additional information about Samsung products, contact your nearest Samsung office.
All brand names, trademarks and registered trademarks belong to their respective owners.
ⓒ 2016 Samsung Electronics Co., Ltd. All rights reserved
Rev. 1.1 Dec. 2016
SAMSUNG CONFIDENTIAL
KLM8G1GETF-B041
KLMAG1JETD-B041
KLMBG2JETD-B041
KLMCG4JETD-B041
Samsung eMMC Product family
eMMC 5.1 Specification compatibility
datasheet
- 2 -
IF THERE IS ANY OTHER OPERATION TO IMPLEMENT IN ADDITION TO SPECIFICATION
IN THE DATASHEET OR JEDEC STANDARD, PLEASE CONTACT EACH BRANCH OFFICE OR
HEADQUARTERS OF SAMSUNG ELECTRONICS.
datasheet
eMMC
Rev. 1.1
SAMSUNG CONFIDENTIAL
KLM8G1GETF-B041
KLMAG1JETD-B041
KLMBG2JETD-B041
KLMCG4JETD-B041
Revision History
Revision No. History Draft Date Remark Editor
0.0 1. Initial issue Aug. 22, 2016 Target S.M.Lee
1.0 1. Customer sample Nov. 15,2016 Final S.M.Lee
1.1 1. 8GB is added (Customer sample) Dec. 12,2016 Final S.M.Lee
- 3 -
IF THERE IS ANY OTHER OPERATION TO IMPLEMENT IN ADDITION TO SPECIFICATION
IN THE DATASHEET OR JEDEC STANDARD, PLEASE CONTACT EACH BRANCH OFFICE OR
HEADQUARTERS OF SAMSUNG ELECTRONICS.
Table Of Contents
datasheet
eMMC
Rev. 1.1
SAMSUNG CONFIDENTIAL
KLM8G1GETF-B041
KLMAG1JETD-B041
KLMBG2JETD-B041
KLMCG4JETD-B041
1.0 PRODUCT LIST..........................................................................................................................................................4
2.0 KEY FEATURES.........................................................................................................................................................4
3.0 PACKAGE CONFIGURATIONS ................................................................................................................................. 5
3.1 153 Ball Pin Configuration ....................................................................................................................................... 5
3.1.1 11.5mm x 13mm x 0.8mm Package Dimension [8GB /16GB] .......................................................................... 6
3.1.2 11.5mm x 13mm x 0.8mm Package Dimension [32GB] ................................................................................... 6
3.1.3 11.5mm x 13mm x 1.0mm Package Dimension [64GB] ................................................................................... 7
3.2 Product Architecture ................................................................................................................................................ 8
4.0 HS400 mode...............................................................................................................................................................9
5.0 New eMMC5.1 Features ............................................................................................................................................. 10
5.1 Overview.................................................................................................................................................................. 10
5.2 Command Queuing ................................................................................................................................................. 10
5.2.1 CMD Set Description......................................................................................................................................... 10
5.2.2 New Response : QSR (Queue Status Register) .............................................................................................. 10
5.2.3 Send Status : CMD13 ...................................................................................................................................... 10
5.2.4 Mechanism of CMD Queue operation............................................................................................................... 11
5.2.5 CMD Queue Register description ..................................................................................................................... 11
5.3 Enhanced Strobe Mode........................................................................................................................................... 11
5.4 RPMB Throughput improve ..................................................................................................................................... 11
5.5 Secure Write Protection........................................................................................................................................... 12
6.0 Technical Notes ..........................................................................................................................................................13
6.1 S/W Algorithm.......................................................................................................................................................... 13
6.1.1 Partition Management ....................................................................................................................................... 13
6.1.1.1 Enhanced Partition (Area) .......................................................................................................................... 13
6.1.2 Boot operation................................................................................................................................................... 13
6.1.3 User Density...................................................................................................................................................... 14
6.1.4 Auto Power Saving Mode.................................................................................................................................. 15
6.1.5 Performance...................................................................................................................................................... 15
7.0 REGISTER VALUE..................................................................................................................................................... 16
7.1 OCR Register .......................................................................................................................................................... 16
7.2 CID Register ............................................................................................................................................................ 16
7.2.1 Product name table (In CID Register) ............................................................................................................... 16
7.3 CSD Register........................................................................................................................................................... 17
7.4 Extended CSD Register .......................................................................................................................................... 18
8.0 AC PARAMETER........................................................................................................................................................ 23
8.1 Timing Parameter .................................................................................................................................................... 23
8.2 Previous Bus Timing Parameters for DDR52 and HS200 mode are defined by JEDEC standard.......................... 23
8.3 Bus Timing Specification in HS400 mode ............................................................................................................... 24
8.3.1 HS400 Device Input Timing .............................................................................................................................. 24
8.3.2 HS400 Device Output Timing............................................................................................................................ 25
8.4 Bus signal levels...................................................................................................................................................... 26
8.4.1 Open-drain mode bus signal level..................................................................................................................... 26
8.4.2 Push-pull mode bus signal level eMMC ............................................................................................................ 26
9.0 DC PARAMETER .......................................................................................................................................................27
9.1 Active Power Consumption during operation .......................................................................................................... 27
9.2 Standby Power Consumption in auto power saving mode and standby state......................................................... 27
9.3 Sleep Power Consumption in Sleep State............................................................................................................... 27
9.4 Supply Voltage ........................................................................................................................................................ 27
9.5 Bus Signal Line Load............................................................................................................................................... 28
- 4 -
IF THERE IS ANY OTHER OPERATION TO IMPLEMENT IN ADDITION TO SPECIFICATION
IN THE DATASHEET OR JEDEC STANDARD, PLEASE CONTACT EACH BRANCH OFFICE OR
HEADQUARTERS OF SAMSUNG ELECTRONICS.
datasheet
eMMC
Rev. 1.1
SAMSUNG CONFIDENTIAL
KLM8G1GETF-B041
KLMAG1JETD-B041
KLMBG2JETD-B041
KLMCG4JETD-B041
INTRODUCTION
SAMSUNG eMMC is an embedded MMC solution designed in a BGA package form. eMMC operation is identical to a MMC device and therefore is a sim-
ple read and write to memory using MMC protocol v5.1 which is a industry standard.
eMMC consists of NAND flash and a MMC controller. 3V supply voltage is required for the NAND area (VDDF or VCC) whereas 1.8V or 3V dual supply
voltage (VDD or VCCQ) is supported for the MMC controller. SAMSUNG eMMC supports HS400 in order to improve sequential bandwidth, especially
sequential read performance.
There are several advantages of using eMMC. It is easy to use as the MMC interface allows easy integration with any microprocessor with MMC host.
Any revision or amendment of NAND is invisible to the host as the embedded MMC controller insulates NAND technology from the host. This leads to
faster product development as well as faster times to market.
The embedded flash management software or FTL(Flash Transition Layer) of eMMC manages Wear Leveling, Bad Block Management and ECC. The
FTL supports all features of the Samsung NAND flash and achieves optimal performance.
1.0 PRODUCT LIST
[Table 1] Product List
2.0 KEY FEATURES
embedded MultiMediaCard Ver. 5.1 compatible.
SAMSUNG eMMC supports features of eMMC5.1 which are defined in JEDEC Standard
- Supported Features : Packed command, Cache, Discard, Sanitize, Power Off Notification, Data Tag,
Partition types, Context ID, Real Time Clock, Dynamic Device Capacity, Command Queuing, Enhanced Strobe Mode,
Secure Write Protection, HS200, HS400, Field Firmware Update.
- Non-supported Features : Large Sector Size (4KB)
Full backward compatibility with previous MultiMediaCard system specification (1bit data bus, multi-eMMC systems)
Data bus width : 1bit (Default), 4bit and 8bit
MMC I/F Clock Frequency : 0 ~ 200MHz
MMC I/F Boot Frequency : 0 ~ 52MHz
Temperature : Operation (-25C ~ 85C), Storage without operation (-40C ~ 85C)
Power : Interface power → VDD(VCCQ) (1.70V ~ 1.95V or 2.7V ~ 3.6V) , Memory power → VDDF(VCC) (2.7V ~ 3.6V)
Capacities eMMC Part ID NAND Flash Type User Density (%) Power System Package size Pin Configuration
8 GB KLM8G1GETF-B041 64Gb x 1
91.0%
- Interface power :
VDD (1.70V ~ 1.95V or
2.7V ~ 3.6V)
- Memory power :
VDDF (2.7V ~ 3.6V)
11.5mm x 13mm x 0.8mm
153FBGA
16 GB KLMAG1JETD-B041 128Gb x 1
32 GB KLMBG2JETD-B041 128Gb x 2
64 GB KLMCG4JETD-B041 128Gb x 4 11.5mm x 13mm x 1.0mm
- 5 -
IF THERE IS ANY OTHER OPERATION TO IMPLEMENT IN ADDITION TO SPECIFICATION
IN THE DATASHEET OR JEDEC STANDARD, PLEASE CONTACT EACH BRANCH OFFICE OR
HEADQUARTERS OF SAMSUNG ELECTRONICS.
datasheet
eMMC
Rev. 1.1
SAMSUNG CONFIDENTIAL
KLM8G1GETF-B041
KLMAG1JETD-B041
KLMBG2JETD-B041
KLMCG4JETD-B041
3.0 PACKAGE CONFIGURATIONS
3.1 153 Ball Pin Configuration
[Table 2] 153 Ball Information
Figure 1. 153-FBGA
CLK : Clock input
Data Strobe : Newly assigned pin for HS400 mode. Data Strobe is generated from eMMC to host.
In HS400 mode, read data and CRC response are synchronized with Data Strobe.
CMD : A bidirectional signal used for device initialization and command transfers.
Command operates in two modes, open-drain for initialization and push-pull for fast command transfer.
DAT0-7 : Bidirectional data channels. It operates in push-pull mode.
RST_n : H/W reset signal pin
VDDF(VCC) : Supply voltage for flash memory
VDD(VCCQ) : Supply voltage for memory controller
VDDi : Internal power node to stabilize regulator output to controller core logics
VSS : Ground connections
RFU : Reserved for future use , do not use for any usage
Pin NO Name
A3 DAT0
A4 DAT1
A5 DAT2
B2 DAT3
B3 DAT4
B4 DAT5
B5 DAT6
B6 DAT7
K5 RSTN
C6 VDD
M4 VDD
N4 VDD
P3 VDD
P5 VDD
E6 VDDF
F5 VDDF
J10 VDDF
K9 VDDF
C2 VDDI
M5 CMD
H5 Data Strobe
M6 CLK
J5 VSS
A6 VSS
C4 VSS
E7 VSS
G5 VSS
H10 VSS
K8 VSS
N2 VSS
N5 VSS
P4 VSS
P6 VSS
Vss
VDDF
VDDF
Vss
Vss
DAT7
VDD
VDDF
CLK
Vss
DAT2
DAT6
VDDF
Vss
RSTN
CMD
Vss
VDD
DAT1
DAT5
V
ss
VDD
VDD
Vss
DAT4
VDD
DAT3
Vss
DAT0
VDD
I
NC
A
B
C
D
E
F
G
H
J
K
L
M
N
P
1234567891011121314
Vss RFU
RFU
RFU RFU RFU
RFU
RFU
RFU
RFU
RFU
Vss
RFU
RFU
RFU
Data
Strobe
Ball-side down view
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