没有合适的资源？快使用搜索试试~ 我知道了~

首页Silicon VLSI Technology_Solutions_Manual_Revised

Silicon VLSI Technology_Solutions_Manual_Revised

集成电路

5星 · 超过95%的资源需积分: 40 74 下载量 177 浏览量更新于2023-03-16 3 收藏 837KB PDF 举报

Berkeley教材Silicon VLSI Technology Fundamemtals, Practice and Modeling的答案，非常全面！

Solutions Manual

Fundamentals, Practice and Modeling Upper Saddle River, NJ.

By Plummer, Deal and Griffin

SILICON VLSI TECHNOLOGY

Fundamentals, Practice and Models

Solutions Manual for Instructors

James D. Plummer

Michael D. Deal

Peter B. Griffin

Solutions Manual

Fundamentals, Practice and Modeling Upper Saddle River, NJ.

By Plummer, Deal and Griffin

Chapter 1 Problems

1.1. Plot the NRTS roadmap data from Table 1.1 (feature size vs. time) on an

expanded scale version of Fig. 1.2. Do all the points lie exactly on a straight

line? If not what reasons can you suggest for any deviations you observe?

Answer:

100

150

200

250

Year

1997 2007 20122002

Interestingly, the actual data seems to consist of two slopes, with a steeper slope for

the first 2 years of the roadmap. Apparently the writers of the roadmap are more

confident of the industry's ability to make progress in the short term as opposed to

the long term.

1.2. Assuming dopant atoms are uniformly distributed in a silicon crystal, how far

apart are these atoms when the doping concentration is a). 10

-3

, b). 10

-3

, c). 5x10

-3

Answer:

The average distance between the dopant atoms would just be one over the cube

root of the dopant concentration:

x = N

−

1/3

x = 1x10

−3

()

−1

= 1x10

−5

cm = 0.1μm =100nm

x = 1x10

−3

()

−1/3

= 1x10

−6

cm = 0.01μm = 10nm

Solutions Manual

Fundamentals, Practice and Modeling Upper Saddle River, NJ.

By Plummer, Deal and Griffin

c) x = 5x10

−3

()

−1/ 3

=1.3x10

−7

cm = 0.0013μm = 1.3nm

1.3. Consider a piece of pure silicon 100 µm long with a cross-sectional area of 1

µm

. How much current would flow through this “resistor” at room

temperature in response to an applied voltage of 1 volt?

Answer:

If the silicon is pure, then the carrier concentration will be simply n

. At room

temperature, n

≈ 1.45 x 10

-3

. Under an applied field, the current will be due to

drift and hence,

I = I

+ I

= qAn

+μ

(

)

= 1.6x10

−19

coul

()

−8

()

1.45x10

carrierscm

−3

()

2000cm

volt

−1

sec

−1

()

1volt

−2

⎛

⎝

⎞

⎠

= 4.64x10

−12

amps or 4.64pA

1.4. Estimate the resistivity of pure silicon in

ohm cm at a) room temperature, b)

77K, and c) 1000 ˚C. You may neglect the temperature dependence of the

carrier mobility in making this estimate.

Answer:

The resistivity of pure silicon is given by Eqn. 1.1 as

ρ=

q μ

n +μ

()

+μ

(

)

Thus the temperature dependence arises because of the change in n

with T. Using

Eqn. 1.4 in the text, we can calculate values for n

at each of the temperatires of

interest. Thus

= 3.1x10

3/ 2

exp −

0.603eV

⎛

⎝

⎞

⎠

which gives values of ≈ 1.45 x 10

-3

at room T, 7.34 x 10

-21

-3

at 77K and 5.8

x 10

-3

at 1000 ˚C. Taking room temperature values for the mobilities , µ

1500 cm

volt

-1

sec

-1

and , µ

= 500 cm

volt

-1

sec

-1

, we have,

Solutions Manual

Fundamentals, Practice and Modeling Upper Saddle River, NJ.

By Plummer, Deal and Griffin

ρ=2.15x10

Ωcm at room T

= 4.26x10

Ωcm at 77K

5.39x10

−4

at 1000 Þ

Note that the actual resistivity at 77K would be much lower than this value because

trace amounts of donors or acceptors in the silicon would produce carrier

concentrations much higher than the n

value calculated above.

1.5. a). Show that the minimum conductivity of a semiconductor sample occurs

when

n = n

b). What is the expression for the minimum conductivity?

c). Is this value greatly different than the value calculated in problem 1.2 for the

intrinsic conductivity?

Answer:

a).

σ=

= q μ

n +μ

(

)

To find the minimum we set the derivative equal to zero.

∴

∂σ

∂n

∂

∂n

q μ

n +μ

(){}

∂

∂n

q μ

n +μ

⎛

⎝

⎜

⎞

⎠

⎟

⎧

⎨

⎩

⎫

⎬

⎭

= q μ

+μ

⎛

⎝

⎜

⎞

⎠

⎟

= 0

∴n

= n

or n = n

b). Using the value for n derived above, we have:

min

= q μ

+μ

⎛

⎝

⎜

⎞

⎠

⎟

= q μ

+μ

⎛

⎝

⎜

⎞

⎠

⎟

= 2qn

c). The intrinsic conductivity is given by

= qn

+μ

(

)

Solutions Manual

Fundamentals, Practice and Modeling Upper Saddle River, NJ.

By Plummer, Deal and Griffin

Taking values of n

= 1.45 x 10

-3

, µ

= 1500 cm

volt

-1

sec

-1

and , µ

= 500

volt

-1

sec

-1

, we have:

= 4.64x10

−

Ωcm and σ

= 4.02x10

−

Ωcm

Thus there are not large differences between the two.

1.6. When a Au atom sits on a lattice site in a silicon crystal, it can act as either a

donor or an acceptor. E

and E

levels both exist for the Au and both are close

to the middle of the silicon bandgap. If a small concentration of Au is placed in

an N type silicon crystal, will the Au behave as a donor or an acceptor? Explain.

Answer:

In N type material, the Fermi level will be in the upper half of the bandgap as shown

in the band diagram below. Allowed energy levels below E

will in general be

occupied by electrons. Thus the E

and E

levels will have electrons filling them.

This means the donor level will not have donated its electron whereas the acceptor

level will have accepted an electron. Thus the Au atoms will act as acceptors in N

type material.

•

Free

Electrons

Holes

1.7. Show that E

is approximately in the middle of the bandgap for intrinsic silicon.

Answer:

Starting with Eqn. 1.9 and 1.10 in the text, we have

n ≅ N

exp −

−

⎛

⎝

⎞

⎠

and p ≅ N

exp −

−

⎛

⎝

⎞

⎠

In intrinsic material, n = p = n

, so we have

剩余156页未读，继续阅读

Kamran Eshraghian的VLSI解决方案深入分析

点击了解资源详情

在标签中，"vlsi__solutions" 和 "vlsi" 表示该文档是针对VLSI领域的问题和解决方案的，有助于快速识别和检索相关主题。由于压缩包内唯一提供的文件名称为 "vlsi.solutions.pdf"，可以推断该压缩包可能包含一个PDF...

优化VLSI布线的Steiner树生成方法

点击了解资源详情

资源摘要信息: "gcl.src.tar.gz_ Steiner tree_VLSI routing_steiner_vlsi_vlsi layo" 在电子工程与计算机科学领域，VLSI（Very-Large-Scale Integration）技术是指在单个半导体芯片上集成成千上万的电子元件，以...

VLSI程序压缩包 - 深入探讨

点击了解资源详情

资源摘要信息: "VLSI.rar_vlsi_vlsi programs" VLSI（Very Large Scale Integration）即超大规模集成电路，是集成电路设计和制造领域中的一个重要分支。VLSI技术涉及到微电子学、材料科学、计算机辅助设计（CAD）、...

vlsi.solutions.rar_VLSI solutions_vlsi

2022-09-22 上传

《VLSI Solutions》是由Kamran Eshraghian编著的一本关于超大规模集成电路（Very Large Scale Integration，简称VLSI）解决方案的专业书籍。这本书深入探讨了VLSI设计的关键技术和方法，是电子工程领域的重要参考...

Silicon Processing for the VLSI Era_ Process Technology. Vol. 1.pdf

2019-07-05 上传

硅基集成电路工艺：process technology provide a comprehensive and up-to-date treatment of this important and rapidly changing field.

fm.rar_C+++VLSI_FM VLSI_fm算法VLSI_vlsi_电路算法设计

2022-09-22 上传

**C++与VLSI（超大规模集成电路）的结合：FM算法在电路设计中的应用** 在计算机硬件领域，VLSI（超大规模集成电路）的设计是一个复杂而关键的过程，它涉及到了电子工程、计算机科学和材料科学等多个学科。在这个...

vlsi.rar_VLSI project_field multipliers_galois_galois field_vlsi

2022-09-21 上传

this is the vlsi based project that is implimentation of reconfigurable multipliers for integers and galois field multiplication

gcl.src.tar.gz_ Steiner tree_VLSI routing_steiner_vlsi_vlsi layo

2022-09-14 上传

BOI version of Steiner tree construction, practical and popular for manhattan VLSI routing, generate a Steiner minimum tree for given set of terminals in a layout plane

pjt.zip.zip_VLSI PROJECTS_dsp projects_vlsi_zip

2022-09-23 上传

这个名为“pjt.zip.zip_VLSI_PROJECTS_dsp_projects_vlsi_zip”的压缩包文件，汇聚了一系列关于这些主题的资源，为学习者提供了丰富的素材和实践案例。 VLSI技术是现代集成电路设计的核心，它允许在单个芯片上集成...

Silicon Processing for the VLSI Era_ Process Integration. Vol. 2.pdf

2019-07-05 上传

集成电路工艺：Process Integration Undertake to explain how the individual processes described in Volume1 are combined in various ways to produce silicon integrated circuits.

Mith1293073864

粉丝: 0
资源: 1

上传资源快速赚钱

我的内容管理展开

我的资源快来上传第一个资源

我的收益

登录查看自己的收益

我的积分登录查看自己的积分

我的C币登录后查看C币余额

我的收藏

我的下载

下载帮助

Silicon VLSI Technology_Solutions_Manual_Revised

Kamran Eshraghian的VLSI解决方案深入分析

优化VLSI布线的Steiner树生成方法

VLSI程序压缩包 - 深入探讨

vlsi.solutions.rar_VLSI solutions_vlsi

Silicon Processing for the VLSI Era_ Process Technology. Vol. 1.pdf

fm.rar_C+++VLSI_FM VLSI_fm算法VLSI_vlsi_电路算法设计

vlsi.rar_VLSI project_field multipliers_galois_galois field_vlsi

gcl.src.tar.gz_ Steiner tree_VLSI routing_steiner_vlsi_vlsi layo

pjt.zip.zip_VLSI PROJECTS_dsp projects_vlsi_zip

Silicon Processing for the VLSI Era_ Process Integration. Vol. 2.pdf

最新资源