3 Power interface .............................................................................................. 23
3.1 Power Receiver design requirements (PRx) ............................................................................................ 23
3.1.1 Dual resonant circuit ....................................................................................................................... 26
3.1.2 Rectification circuit .......................................................................................................................... 28
3.1.3 Sensing circuits ................................................................................................................................ 28
3.1.4 Communications modulator ............................................................................................................ 28
3.1.5 Communications demodulator ........................................................................................................ 28
3.1.6 Output disconnect ........................................................................................................................... 28
3.1.7 Meaningful functionality ................................................................................................................. 29
3.1.8 Shielding .......................................................................................................................................... 29
3.1.9 Power consumption ........................................................................................................................ 29
3.2 Power Transmitter design requirements (PTx) ....................................................................................... 30
3.2.1 Load step and load dump (informative) .......................................................................................... 30
3.2.2 Load step test procedure................................................................................................................. 31
3.2.3 Load dump test procedure .............................................................................................................. 33
3.2.4 Power Receiver over-voltage protection ......................................................................................... 36
4 Thermal interface ........................................................................................... 43
4.1 Interface Surface temperature rise......................................................................................................... 43
5 Information interface ...................................................................................... 44
5.1 System Control ........................................................................................................................................ 44
5.1.1 Overview (informative) ................................................................................................................... 44
5.1.2 Power Transmitter (PTx) perspective .............................................................................................. 50
5.1.3 Power Receiver (PRx) perspective ................................................................................................... 71
5.1.4 State diagram (informative) ............................................................................................................ 86
5.2 Power Receiver to Power Transmitter communications interface ......................................................... 87
5.2.1 Introduction ..................................................................................................................................... 87
5.2.2 Physical and data link layers (PRx to PTx) ........................................................................................ 87
5.2.3 Logical layer (PRx to PTx) ................................................................................................................. 93
5.3 Power Transmitter to Power Receiver communications interface ....................................................... 108
5.3.1 Introduction ................................................................................................................................... 108
5.3.2 Physical and data link layers (PTx to PRx) ...................................................................................... 108
5.3.3 Logical layer (PTx to PRx) ............................................................................................................... 114
