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© Copyright 2016–2018 Xilinx
© Copyright 2016–2018 Xilinx
Page 2
CG
Devices
EG
Devices
EV
Devices
Application Processor
Zynq® UltraScale+™ MPSoCs
Dual-core ARM® Cortex™-A53
MPCore™ up to 1.3GHz
Real-Time Processor
Graphics Processor
Video Codec
Programmable Logic
Dual-core ARM Cortex-R5
MPCore up to 533MHz
103K–600K System Logic Cells
Applications
Quad-core ARM Cortex-A53
MPCore up to 1.5GHz
Dual-core ARM Cortex-R5
MPCore up to 600MHz
103K–1143K System Logic Cells
Mali™-400 MP2
Quad-core ARM Cortex-A53
MPCore up to 1.5GHz
Dual-core ARM Cortex-R5
MPCore up to 600MHz
192K–504K System Logic Cells
Mali™-400 MP2
H.264 / H.265
• Situational Awareness
• Surveillance/Reconnaissance
• Smart Vision
• Image Manipulation
• Graphic Overlay
• Human Machine Interface
• Automotive ADAS
• Video Processing
• Interactive Display
• Flight Navigation
• Missile & Munitions
• Military Construction
• Secure Solutions
• Networking
• Cloud Computing Security
• Data Center
• Machine Vision
• Medical Endoscopy
• Sensor Processing & Fusion
• Motor Control
• Low-cost Ultrasound
• Traffic Engineering
© Copyright 2016–2018 Xilinx
Page 3
Zynq® UltraScale+™ MPSoCs: CG Block Diagram
Processing System
Programmable Logic
Memory
Platform
Management Unit
Configuration and
Security Unit
System
Management
Power
Management
Application Processing Unit
2
1
ARM®
Cortex™-A53
NEON™
32KB
I-Cache
w/Parity
Floating Point Unit
32KB
D-Cache
w/ECC
Memory
Management
Unit
Embedded
Trace
Macrocell
GIC-400 SCU
1MB L2 w/ECC
CCI/SMMU
Config AES
Decryption,
Authentication,
Secure Boot
Voltage/Temp
Monitor
High-Speed
Connectivity
DisplayPort v1.2a
USB 3.0
SATA 3.1
PCIe® 1.0 / 2.0
PS-GTR
General Connectivity
DDR4/3/3L,
LPDDR4/3
32/64-Bit w/ ECC
256KB OCM
with ECC
Real-Time Processing Unit
2
1
ARM
Cortex™-R5
Vector Floating
Point Unit
128KB
TCM w/ECC
32KB I-Cache
w/ECC
32KB D-Cache
w/ECC
GIC
Memory Protection
Unit
Functional
Safety
TrustZone
GigE
CAN
UART
SPI
Quad SPI NOR
NAND
SD/eMMC
USB 2.0
System
Functions
Timers,
WDT, Resets,
Clocking & Debug
Multichannel DMA
Storage & Signal Processing
Block RAM
UltraRAM
DSP
General-Purpose I/O
High-Performance HP I/O
High-Density HD I/O
High-Speed Connectivity
GTH
PCIe Gen3
System Monitor
© Copyright 2016–2018 Xilinx
Page 4
Zynq® UltraScale+™ MPSoCs: CG Devices
Device Name
(1)
ZU2CG ZU3CG ZU4CG ZU5CG ZU6CG ZU7CG ZU9CG
Processing
System (PS)
Application
Processor Unit
Processor Core
Dual-core ARM® Cortex™-A53 MPCore™ up to 1.3GHz
Memory w/ECC
L1 Cache 32KB I / D per core, L2 Cache 1MB, on-chip Memory 256KB
Real
-Time
Processor Unit
Processor Core
Dual-core ARM Cortex-R5 MPCore up to 533MHz
Memory w/ECC
L1 Cache 32KB I / D per core, Tightly Coupled Memory 128KB per core
External
Memory
Dynamic
Memory Interface
x32/x64: DDR4, LPDDR4, DDR3, DDR3L, LPDDR3 with ECC
Static
Memory Interfaces
NAND, 2x Quad-SPI
Connectivity
High-
Speed Connectivity
PCIe® Gen2 x4, 2x USB3.0, SATA 3.1, DisplayPort, 4x Tri-mode Gigabit Ethernet
General Connectivity
2xUSB 2.0, 2x SD/SDIO, 2x UART, 2x CAN 2.0B, 2x I2C, 2x SPI, 4x 32b GPIO
Integrated Block
Functionality
Power Management
Full / Low / PL / Battery Power Domains
Security
RSA, AES, and SHA
AMS -
System Monitor
10-bit, 1MSPS – Temperature and Voltage Monitor
PS to PL
Interface
12 x 32/64/128b AXI Ports
Programmable
Logic (PL)
Programmable
Functionality
System Logic Cells (
K)
103 154 192 256 469 504 600
CLB Flip-Flops
(K)
94 141 176 234 429 461 548
CLB LUTs (K)
47 71 88 117 215 230 274
Memory
Max. Distributed
RAM (Mb)
1.2 1.8 2.6 3.5 6.9 6.2 8.8
Total Block
RAM (Mb)
5.3 7.6 4.5 5.1 25.1 11.0 32.1
UltraRAM (Mb)
- - 13.5 18.0 - 27.0 -
Clocking
Clock
Management Tiles (CMTs)
3 3 4 4 4 8 4
Integrated
IP
DSP Slices
240 360 728 1,248 1,973 1,728 2,520
PCI Express® Gen
3x16
- - 2 2 - 2 -
150G Interlaken
- - - - - - -
100G Ethernet MAC/PCS
w/RS-
FEC
- - - - - - -
AMS - System
Monitor
1 1 1 1 1 1 1
Transceivers
GTH 16.3Gb/s Transceivers
- - 16 16 24 24 24
GTY 32.75Gb/s Transceivers
- - - - - - -
Speed Grades
Extended
(2)
-1 -2 -2L
Industrial
-1 -1L -2
Notes:
1. For full part number details, see the Ordering Information section in DS891, Zynq UltraScale+ MPSoC Overview.
2.-2LE (Tj = 0°C to 110°C). For more details, see the Ordering Information section in DS891, Zynq UltraScale+ MPSoC Overview.
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