5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE CLK5
PCIE CLK6
PCIE CLK0 GPU
LAN
WLAN
check if need to change to 1M_0402_1% follow PDG,
CRB is 1M_0402_5%
check the Pull up resistor
need to use 38.4MHz (30ohm) for Cannonlake-u
when single end external clock generator used,
this pin should be grounded
EMMC_RCOMP
RTC_X1
XTAL24_OUT
XTAL24_IN
PCIE_CLKREQ1#
RTC_X2
CSI2_COMP
PCIE_CLKREQ2#
CLK_PCIE_GPU#
GPU_CLKREQ#
CLK_PCIE_GPU
CLK_PCIE_LAN#
LAN_CLKREQ#
CLK_PCIE_LAN
PCIE_CLKREQ3#
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
WLAN_CLKREQ#
RTC_RST#
SRTC_RST#
SUSCLK
XTAL24_OUT
XTAL24_IN
CLK_PCIE_XDP
CLK_PCIE_XDP#
SUSCLK
RTC_RST#
SRTC_RST#
DIFFCLK_BIASREF
RTC_X2
RTC_X1
RTC_X1
XTAL24_IN
DIFFCLK_BIASREF
PCIE_CLKREQ2#
PCIE_CLKREQ1#
WLAN_CLKREQ#
PCIE_CLKREQ3#
GPU_CLKREQ#
LAN_CLKREQ#
CLK_PCIE_GPU#20
CLK_PCIE_GPU20
GPU_CLKREQ#21
CLK_PCIE_LAN#37
CLK_PCIE_LAN37
LAN_CLKREQ#37
CLK_PCIE_WLAN#40
CLK_PCIE_WLAN40
WLAN_CLKREQ#40
SUSCLK 40
RTC_CLK31
24M_CLK31
EC_RTC_RST# 44
+3VS
VCCRTC
+VCCCLK5
Size Document Number Rev
Date: Sheet of
Security Classification
LC Future Center Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Issued Date
Deciphered Date
Title
BMWQ1
0.3
MCP (CSI2,EMMC,CLOCK)
Custom
10 60
Thursday, May 28, 2015
2014/12/11
2015/12/11
Size Document Number Rev
Date: Sheet of
Security Classification
LC Future Center Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Issued Date
Deciphered Date
Title
BMWQ1
0.3
MCP (CSI2,EMMC,CLOCK)
Custom
10 60
Thursday, May 28, 2015
2014/12/11
2015/12/11
Size Document Number Rev
Date: Sheet of
Security Classification
LC Future Center Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Issued Date
Deciphered Date
Title
BMWQ1
0.3
MCP (CSI2,EMMC,CLOCK)
Custom
10 60
Thursday, May 28, 2015
2014/12/11
2015/12/11
CC5
9P_0402_50V8J
1
2
RC50 200_0402_1%
1 2
RPC4
10K_0804_8P4R_5%
1 8
2 7
3 6
4 5
RC122
0_0402_5%
GCLK@
1 2
RC34 20K_0402_1%
1 2
RC73 100_0402_1%
1 2
RC33 20K_0402_1%
1 2
RC1555
60.4_0402_1%
Cannonlake@
1 2
CC4
8P_0402_50V8J
1
2
YC1
32.768KHZ_9PF_X1A0001410002
1 2
CC6
1U_0402_10V6K
1
2
RPC3
10K_0804_8P4R_5%
@
1 8
2 7
3 6
4 5
SKL_ULT
CLOCK SIGNALS
?
?
1 OF 20
REV = 1
UC1J
SKYLAKE-U_BGA1356
@
CLKOUT_PCIE_N0
D42
CLKOUT_PCIE_P0
C42
GPP_B5/SRCCLKREQ0#
AR10
CLKOUT_PCIE_N1
B42
CLKOUT_PCIE_P1
A42
GPP_B6/SRCCLKREQ1#
AT7
CLKOUT_PCIE_N2
D41
CLKOUT_PCIE_P2
C41
GPP_B7/SRCCLKREQ2#
AT8
CLKOUT_PCIE_N3
D40
CLKOUT_PCIE_P3
C40
GPP_B8/SRCCLKREQ3#
AT10
CLKOUT_PCIE_N4
B40
CLKOUT_PCIE_P4
A40
GPP_B9/SRCCLKREQ4#
AU8
CLKOUT_PCIE_N5
E40
CLKOUT_PCIE_P5
E38
GPP_B10/SRCCLKREQ5#
AU7
CLKOUT_ITPXDP_N
F43
CLKOUT_ITPXDP_P
E43
GPD8/SUSCLK
BA17
XTAL24_IN
E37
XTAL24_OUT
E35
XCLK_BIASREF
E42
RTCX1
AM18
RTCX2
AM20
SRTCRST#
AN18
RTCRST#
AM16
TC85 @
1
CC3
1U_0402_10V6K
1
2
TC87 @
1
CC11
2.7P_0402_50V9-B
1
2
RC121
0_0402_5%
GCLK@
1 2
YC2
24MHZ_6PF_X1E000021088000
OSC1
1
GND1
2
OSC2
3
GND2
4
CC12
2.7P_0402_50V9-B
1
2
SKL_ULT
CSI-2
EMMC
?
?
1 OF 20
REV = 1
UC1I
SKYLAKE-U_BGA1356
@
CSI2_DN0
A36
CSI2_DP0
B36
CSI2_DN1
C38
CSI2_DP1
D38
CSI2_DN2
C36
CSI2_DP2
D36
CSI2_DN3
A38
CSI2_DP3
B38
CSI2_DN4
C31
CSI2_DP4
D31
CSI2_DN5
C33
CSI2_DP5
D33
CSI2_DN6
A31
CSI2_DP6
B31
CSI2_DN7
A33
CSI2_DP7
B33
CSI2_DN8
A29
CSI2_DP8
B29
CSI2_DN9
C28
CSI2_DP9
D28
CSI2_DN10
A27
CSI2_DP10
B27
CSI2_DN11
C27
CSI2_DP11
D27
CSI2_CLKN0
C37
CSI2_CLKP0
D37
CSI2_CLKN1
C32
CSI2_CLKP1
D32
CSI2_CLKN2
C29
CSI2_CLKP2
D29
CSI2_CLKN3
B26
CSI2_CLKP3
A26
CSI2_COMP
E13
GPP_D4/FLASHTRIG
B7
GPP_F13/EMMC_DATA0
AP2
GPP_F14/EMMC_DATA1
AP1
GPP_F15/EMMC_DATA2
AP3
GPP_F16/EMMC_DATA3
AN3
GPP_F17/EMMC_DATA4
AN1
GPP_F18/EMMC_DATA5
AN2
GPP_F19/EMMC_DATA6
AM4
GPP_F20/EMMC_DATA7
AM1
GPP_F21/EMMC_RCLK
AM2
GPP_F22/EMMC_CLK
AM3
GPP_F12/EMMC_CMD
AP4
EMMC_RCOMP
AT1
JCMOS1
SHORT PADS
@
12
RC72 2.7K_0402_1%
1 2
RC32 10M_0402_5%
12
RC71 1M_0402_5%
12
RC1624
0_0402_5%
@
1 2
RC95 1K_0402_5%@
1 2