IN
IN
IN
IN
IN
IN
IN
IN
OUT
OUT
IN
OUT
IN
OUT
OUT
IN
NC
NC
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
TP
TP
TP
TP
TP
TP
OUT
OUT
OUT
G
D
S G
D
SG
D
S G
D
S
OUT
OUT
OUT
IN
OUT
IN
OUT
IN
IN
TP
OUT
IN
BI
OUT
TP
TP
BI
TP
BI
TP
BI
OUT
BI
IN
OUT
OUT
OUT
OUT
BI
IN
BI
IN
OUT
IN
OUT
BI
TP
IN
OUT
GND
VCC
NCNC
YA
NC
IN
NC
IN
TP
IN
TP
IN
IN
BI
IN
OUT
IN
IN
IN
IN
IN
Apple Inc.
THE INFORMATION CONTAINED HEREIN IS THE
PROPRIETARY PROPERTY OF APPLE INC.
124578
B
D
87
6 5 4 3
C
B
A
NOTICE OF PROPRIETARY PROPERTY:
PAGE
12
D
A
C
PAGE TITLE
SHEET
IV ALL RIGHTS RESERVED
R
D
SIZE
DRAWING NUMBER
REVISION
BRANCH
6 3
THE POSESSOR AGREES TO THE FOLLOWING:
I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
NOTE: Should force PCH GPIO47 high to ensure TBT router powered to avoid leakage/clamping of signals.
These signals do not connect to XDP connector in this architecture, only accessible
via Top-Side Probe. Nets are listed here to show XDP associations and to make clear
what restrictions exist on PCH GPIOs when Top-Side Probe is used for PCH debug.
PCH/XDP Signals
USB Overcurrents are aliased, do not cause USB OC# events during PCH debug.
SDCONN_STATE_CHANGE_L is aliased, do not plug/unplug SD Cards during PCH debug.
PCH XDP Signals
VCC_OBS_AB
SSD_PCIEx_SEL_L straps are connected via 1K to common net.
LPCPLUS_GPIO is aliased, do not attempt use during PCH debug.
Unused & MLB_RAMCFGx GPIOs have TPs.
NOTE: Must not short XDP pins together!
Non-XDP Signals
NOTE: XDP_DBRESET_L pulled-up to 3.3V on PCH Support Page
TDI and TMS are terminated in CPU.
HOOK2
TDO
TRSTn
Merged (CPU/PCH) Micro2-XDP
OBSFN_D0
SCL
OBSDATA_D2
OBSDATA_A1
Use with 921-0133 Adapter Flex to
NOTE: This is not the standard XDP pinout.
TCK0
TCK1
SDA
HOOK1
HOOK3
OBSDATA_B3
OBSDATA_B2
PWRGD/HOOK0
OBSDATA_B1
OBSDATA_B0
OBSFN_B0
OBSDATA_A2
OBSDATA_A3
OBSFN_B1
OBSDATA_A0
TDI
TMS
ITPCLK/HOOK4
XDP_PRESENT#
DBR#/HOOK7
OBSDATA_D3
ITPCLK#/HOOK5
OBSFN_D1
OBSDATA_D1
OBSDATA_D0
OBSDATA_C2
OBSDATA_C3
OBSDATA_C1
OBSFN_C1
OBSDATA_C0
OBSFN_C0
518S0847
support chipset debug.
Extra BPM Testpoints
RESET#/HOOK6
VCC_OBS_CD
OBSFN_A1
OBSFN_A0
CPU JTAG Isolation
JTAG_ISP (non-TMS) nets are aliased, do not attempt bit-banged JTAG during PCH debug.
6
70
13
15 18
6
70
6
70
6
70
6
70
6
70
6
70
13
36 72
13 17 36 72
12 16 70
17 72
6
70
12
16 70
12 16 70
5% 201
1/20W
MF
XDP
1K
PLACE_NEAR=U0500.AG7:2.54mm
R1805
12
5% 201
1/20W
MF
XDP
51
PLACE_NEAR=U0500.E60:28mm
R1813
21
5%
0
402
MF-LF
XDP
1/16W
R1804
12
5%
0
0201
1/20W
MF
XDP
PLACE_NEAR=U5000.J3:2.54mm
R1802
12
5% 201
1/20W
MF
1K
XDP
PLACE_NEAR=U0500.C61:2.54mm
R1800
12
6
70
M-ST-SM1
CRITICAL
DF40RC-60DP-0.4V
XDP_CONN
J1800
1
10
1112
1314
1516
1718
19
2
20
2122
2324
2526
2728
29
3
30
3132
3334
3536
3738
39
4
40
4142
4344
4546
4748
49
5
50
5152
5354
5556
5758
59
6
60
61
62
6364
78
9
6
70
6
70
6
70
6
70
6
70
6
70
6
70
6
70
6
70
6
70
TP-P6
TP1806
1
TP-P6
TP1807
1
TP-P6
TP1805
1
TP-P6
TP1804
1
TP-P6
TP1803
1
TP-P6
TP1802
1
8
5%
150
402
MF-LF
1/16W
R1830
1
2
5% 201
1/20W
MF
51
XDP
PLACE_NEAR=U0500.F62:28mm
R1810
12
12
16 70
5%
XDP
MF-LF
402
1/16W
1K
R1831
1
2
5% 201
1/20W
MF
51
PLACE_NEAR=U0500.AE62:28mm
NO STUFF
R1896
21
5% 201
1/20W
MF
51
XDP
PLACE_NEAR=U0500.AD62:28mm
R1892
21
5% 201
1/20W
MF
51
XDP
PLACE_NEAR=U0500.AD61:28mm
R1891
21
5% 201
1/20W
MF
XDP
51
PLACE_NEAR=U0500.AE61:28mm
R1890
21
5% 201
1/20W
MF
1K
PLACE_NEAR=U0500.AE63:28mm
NO STUFF
R1899
21
5%
0
0201
1/20W
MF
XDP
PLACE_NEAR=J1800.58:28mm
R1835
12
12
16 70
PLACE_NEAR=J1800.57:28mm
XDP
SOT-563
DMN5L06VK-7
CRITICAL
Q1842
6
2
1
XDP
SOT-563
DMN5L06VK-7
CRITICAL
PLACE_NEAR=J1800.51:28mm
Q1840
3
5
4
PLACE_NEAR=J1800.55:28mm
CRITICAL
XDP
DMN5L06VK-7
SOT-563
Q1842
3
5
4
CRITICAL
XDP
DMN5L06VK-7
SOT-563
PLACE_NEAR=J1800.53:28mm
Q1840
6
2
1
6
12
16 70
6
70
6
70
6
16
70
XDP
CERM-X5R
0201
6.3V
0.1UF
10%
C1801
1
2
15
16 18
14
14 16 63
6
70
14 16
63
TP-P6
TP1870
1
14
16 33 14 16 33
15 18
14
TP-P6
TP1874
1
XDP
CERM-X5R
0201
6.3V
0.1UF
10%
C1800
1
2
TP-P6
TP1876
1
15
18
TP-P6
TP1877
1
15
18
TP-P6
TP1878
1
15
18
12
15
15 18 23
12
12
12
5% 201
1/20W
MF
1K
R1881
12
5% 201
1/20W
MF
1K
R1882
12
6
70
5% 201
1/20W
MF
1K
R1883
12
5% 201
1/20W
MF
1K
R1884
12
30
15
16 45 68
6
70
15
15 18
23
15 16 45 68
TP-P6
TP1887
1
XDP
CERM-X5R
0201
6.3V
0.1UF
10%
C1804
1
2
XDP
CERM-X5R
0201
6.3V
0.1UF
10%
C1806
1
2
6
70
6
12
16 70
5% 201
1/20W
MF
PLACE_NEAR=U0500.AU62:28mm
NO STUFF
51
R1897
21
74LVC1G07GF
SOT891
U1845
2
3
1
5
6
4
16V
0201
X5R-CERM
0.1UF
10%
C1845
1
2
6
70
5%
201
1/20W
MF
330K
R1845
1
2
17
36 61
TP-P6
TP1873
1
15
16 18
TP-P6
TP1886
1
6
70
6
70
14
19 39 63 68 72
14 19 39 63 68 72
6
16
70
6
70
8
17
70
6
70
6
70
6
70
SYNC_MASTER=J44
CPU/PCH Merged XDP
SYNC_DATE=08/12/2013
CPU_PWR_DEBUG
CPU_CFG<4>
XDP_SYS_PWROK
PP3V3_S5
ALL_SYS_PWRGD
PP5V_S0
XDP_PCH_TMS
XDP_PCH_TMS
XDP_CPUPCH_TRST_L
CPU_CFG<1>
XDP_PCH_TDO
XDP_PCH_TDI
XDP_CPU_PRESENT_L
MAKE_BASE=TRUE
XDP_CPUPCH_TRST_L
XDP_CPU_TCK
XDP_BPM_L<6>
XDP_BPM_L<7>
XDP_BPM_L<5>
XDP_BPM_L<4>
XDP_BPM_L<3>
XDP_BPM_L<2>
PP1V05_SUS
PCH_JTAGX
XDP_PCH_TDI
XDP_CPU_TDO
XDP_PCH_TDO
PP1V05_S0
XDP_CPU_PRDY_L
XDP_CPU_PREQ_L
CPU_CFG<0>
CPU_CFG<2>
XDP_BPM_L<1>
XDP_BPM_L<0>
CPU_CFG<5>
CPU_CFG<6>
CPU_CFG<7>
SMBUS_PCH_CLK
XDP_PCH_TCK
CPU_VCCST_PWRGD
XDP_CPU_PWRBTN_L
PP1V05_S0
CPU_CFG<3>
PM_PWRBTN_L
PCH_JTAGX
PM_PCH_SYS_PWROK
CPU_CFG<17>
CPU_CFG<16>
CPU_CFG<8>
CPU_CFG<9>
CPU_CFG<18>
CPU_CFG<12>
CPU_CFG<13>
CPU_CFG<14>
CPU_CFG<15>
XDP_CPURST_L
PLT_RESET_L
XDP_CPU_TDO
XDP_CPUPCH_TRST_L
XDP_CPUPCH_TRST_L
XDP_CPU_TDI
XDP_CPU_TMS
CPU_CFG<10>
CPU_CFG<11>
CPU_CFG<19>
XDP_PCH_TCK
XDP_TRST_L
XDP_DBRESET_L
XDP_JTAG_CPU_ISOL_L
XDP_CPU_VCCST_PWRGD
XDP_CPU_TCK
SSD_PCIE_SEL_L
XDP_USB_EXTA_OC_L
XDP_USB_EXTB_OC_L
XDP_SDCONN_STATE_CHANGE_L
JTAG_ISP_TCK
XDP_LPCPLUS_GPIO
XDP_MLB_RAMCFG0
XDP_USB_EXTA_OC_L
MAKE_BASE=TRUE
XDP_USB_EXTB_OC_L
MAKE_BASE=TRUE
XDP_USB_EXTC_OC_L
MAKE_BASE=TRUE
XDP_SDCONN_STATE_CHANGE_L
XDP_USB_EXTD_OC_L
XDP_MLB_RAMCFG1
MAKE_BASE=TRUE
XDP_JTAG_ISP_TCK
XDP_SSD_PCIE1_SEL_L
XDP_PCH_GPIO76
MAKE_BASE=TRUE
XDP_JTAG_ISP_TDI
SMBUS_PCH_DATA
JTAG_ISP_TDI
MAKE_BASE=TRUE
XDP_LPCPLUS_GPIO
XDP_SSD_PCIE0_SEL_L
XDP_SSD_PCIE2_SEL_L
XDP_PCH_GPIO17
XDP_SSD_PCIE3_SEL_L
XDP_MLB_RAMCFG3
XDP_MLB_RAMCFG2
18 OF 120
<E4LABEL>
<SCH_NUM>
<BRANCH>
16 OF 78
72
8
11
13 15 17 18 26 27 29 56
59 60 61 65 68 77
17 32 41 44 45 53 54 58 60 61
65 68
12 16 70
6
12
16 70
6
12
16 70
6
16
70
59 65
12 16 70
12 16 70
6
16
70
12 16 70
6
8
11
15 16 17 37 53 57 60
61 65 68
72
6
8
11
15 16 17 37 53 57 60
61 65 68
12 16 70
70
70