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NCS8801S_Datasheet
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更新于2023-05-23
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RGB/LVDS转eDP芯片,支持2K分辨率,NCS8801S完整开发手册。
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NCS8801S
!
Datasheet
!
!
!
!
V0.93!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!Page!1!
NewCoSemi!Technology!
Proprietary!&!Confidential!
NewCoSemi
!
RGB/LVDS-to-eDP Converter
1 Features
Embedded-DisplayPort (eDP) Output
2-lane/4-lane eDP @ 1.62/2.7Gbps per lane
FHD to WQXGA (2560*1600) supported
Up to 6dB pre-emphasis
RGB Input
18/24bit RGB Interface
Pixel clock up to 270MHz
SDR/DDR supported
Pin order reversal supported
LVDS Input
Dual-channel 6/8bit LVDS (Sync) interface
400Mbps to 1Gbps per data pair
Built-in termination
Channel and polarity swap supported
Reference Clock
Any freq. between 19MHz and 100MHz
Crystal or single-ended clock input
Built-in 5000ppm SSC generator
Misc
I
2
C/SPI for chip configuration
Built-in eDP handshake protocol
I
2
C-AUX channel for TCON/DPCD/EDID
control
Built-in video test pattern
Power
1.2V core supply
2.5V or 3.3V IO supply
RGB IO can go down to 1.8V
Power consumption ~ 150mW
@ 2048*1536*24bit*60Hz, LVDS mode
Deep-sleep mode power <1mW
Package
QFN-56 (7mm x 7mm) package
RoHS Compliant
2 Block Diagram
!
PCLK
HSYNC
VSYNC
DE
D[23:0]
!
LVDIE[3:0]P/N
LVCIEP/N
LVDIO[3:0]P/N
LVCIOP/N
SDA
SCL
!
CSB
SCK
MOSI
MISO
XTAL_IN
XTAL_OUT
DPO0P/N
DPO1P/N
DPO2P/N
DPO3P/N
DPAUXP/N
RESETB
PWD
I2CSEL
TEST
AVDD33
XVDD33
HSVDD33
DVDD33
AVDD12
DVDD12
DVDD12
馬 1 3 5 1 0 5 8 3 8 0 6 q 9 5 1 3 1 5 1 5 3
ma 1 3 5 1 0 5 8 3 8 0 6 q 9 5 1 3 1 5 1 5 3
NCS8801S!
Datasheet!
!
!
!
V0.93!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!Page!2!
NewCoSemi!Technology!
Proprietary!&!Confidential!
NewCoSemi!
3 General Description
NCS8801S is a low-power RGB/LVDS-to-DisplayPort/eDP converter, which is designed for
mobile devices including smartphones, tablets, laptops, etc. to support high-definition DP/eDP
displays.
NCS8801S supports 4-lane DP/eDP output which is typically required to support QXGA
(2048*1536) and above at 60Hz frame rate.
All the functions including both RGB and LVDS interfaces pack into a small 7mm*7mm
QFN56 package which saves the precious space in mobile devices.
4 Pin Diagram
NCS8801S is fully compliant with NCS8801.
NCS8801 S
GND
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
2
3
4
5
6
7
8
9
10
1
11
12
13
14
42
41
40
39
38
37
36
35
34
33
32
31
30
29
VSYNC
HSYNC
PCLK
LVD IO0N/D23
LVD IO0P/D22
LVD IO1N/D21
LVD IO1P/D20
LVD IO2N/D19
LVD IO2P/D18
LVC ION/D17
LVC IOP/D16
LVD IO3N/D15
LVD IO3P/D14
HSVDD33
LVD IE0N/D13
LVD IE0P/D12
LVD IE1N/D11
LVD IE1P/D10
LVD IE2N/D09
LVD IE2P/D08
LVC IEN/D07
LVCIEP/D06
LVD IE3N/D05
LVD IE3P/D04
D03
D02
D01
D00
DPO3P
DPO3N
DPO2P
DPO2N
DPO1P
DPO1N
DPO0P
DPO0N
DPAUXN
DPAUXP
AVDD33
XVDD33
XTALOUT
XTALIN
DE
I2CSEL
SDA
SCL
DVDD12
CSB
SCK
MOSI
MISO
DVDD33
RSTB
PWD
TEST
AVDD 12
(Top view)
NCS8801S!
Datasheet!
!
!
!
V0.93!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!Page!3!
NewCoSemi!Technology!
Proprietary!&!Confidential!
NewCoSemi!
5.1 Pin Description (LVDS+I
2
C Mode)
No.
Pin Name
Description
1!
VSYNC!
Connect!to!ground!in!LVDS!m ode!
2!
HSYNC!
Connect!to!ground!in!LVDS!m ode!
3!
PCLK!
Connect!to!ground!in!LVDS!mode!
4!
LVDIO0N!
LVDS!data!channel!0!negative,!odd!pixel!
5!
LVDIO0P!
LVDS!data!channel!0!positive,!odd!pixel!
6,7!
LVDIO1N,P !
LVDS!data!channel!1,!odd!pixel!
8,9!
LVDIO2N,P !
LVDS!data!channel!2,!odd!pixel!
10,11!
LVCION,P!
LVDS!clock!channel,!odd!pixel!
12,13!
LVDIO3N,P!
LVDS!data!channel!3,!odd!pixel!
14!
HSVDD33!
2.5/3.3V!power!supply!for!LVDS!
15,16!
LVDIE0N,P!
LVDS!data!channel!0,!even!pixel!
17,18!
LVDIE1N,P!
LVDS!data!channel!1,!even!pixel!
19,20!
LVDIE2N,P!
LVDS!data!channel!2,!even!pixel!
21,22!
LVCIEN,P!
LVDS!clock!channel,!even!pixel!
23,24!
LVDIE3N,P!
LVDS!data!channel!3,!even!pixel!
25~28!
D3~D0!
Connect!to!ground!in!LVDS!m ode!
29!
XTALIN!
Crystal!or!clock!input!
30!
XTALOUT!
Crystal!
31!
XVDD33!
2.5/3.3V!power!supply!for!crystal!oscillator!!
32!
AVDD33!
2.5/3.3V!power!supply!for!analog!
33!
DPAUXP!
eDP!AUX!channel!positive!
34!
DPAUXN!
eDP!AUX!channel!negative!
35!
DPO0N!
eDP!data!channel!0!negative!
36!
DPO0P!
eDP!data!channel!0!positive!
37,38!
DPO1N,P!
eDP!data!channel!1!
39,40!
DPO2N,P!
eDP!data!channel!2!
41,42!
DPO3N,P!
eDP!data!channel!3!
43!
AVDD12!
1.2V!power!supply!for!analog!
44!
TEST!
Not!connected!
45!
PWD!
Power!down,!active!high!
46!
RSTB!
Reset,!active!low!
47!
DVDD33!
2.5/3.3V!power!supply!for!digital!IOs!
48!
MISO!
Not!connected!in!I
2
C!mode!
49!
MOSI!
Connect!to!ground!in!I
2
C!mode!
50!
SCK!
Connect!to!ground!in!I
2
C!mode!
51!
CSB!
Connect!to!DVDD33!in!I
2
C!mode!
52!
DVDD12!
1.2V!power!supply!for!digital!core!
53!
SCL!
I
2
C!clock!
54!
SDA!
I
2
C!data!
55!
I2CSEL!
Connect!to!DVDD33!in!I
2
C!mode!
56!
DE!
Connect!to!ground!in!LVDS!m ode!
Thermal!
GND!
Ground!
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