Java编写的CPU模拟器：设计与实战教程

CPU

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CPU Sim是一款由Dale Skrien开发的Java应用程序，它提供了一个高级平台，让用户能够在微码级别设计和模拟简单的计算机处理器。这个工具特别适用于教育环境中，因为它支持多种架构，包括基于accumulator（累加器）的、RISC（Reduced Instruction Set Computing）风格的以及像JVM（Java Virtual Machine）这样的堆栈基础架构。用户可以通过这款软件编写机器语言或汇编语言程序，并在自定义的CPU上运行，以此来深入理解不同类型的处理器工作原理和编程实践。该软件的核心功能包括： 1. **微码设计**：用户可以创建定制化的处理器结构，包括指令集、寄存器体系、控制逻辑等，这有助于学习者理解计算机硬件如何执行指令。 2. **模拟环境**：通过模拟器，用户能够测试他们设计的CPU对各种指令和程序的响应，观察执行过程，这对于理解和调试程序设计至关重要。 3. **适应性广泛**：支持不同类型的处理器架构，如RISC设计的简化指令集，有助于对比分析不同架构的性能和效率。 4. **Java技术的应用**：作为一款基于Java的应用，它利用了Java语言的优势，如跨平台兼容性、面向对象编程和丰富的类库支持，使得代码可重用性和维护性增强。 5. **教学辅助工具**：对于教育工作者来说，它是一个理想的实验平台，能帮助学生亲手构建和体验计算机系统的基本构造，提升他们的实践能力。 6. **社区贡献**：CPUSim的成功也得益于多个开发者如Mark Fisher、David Flanagan和Mark Johnson的开源代码贡献，特别是Java Help示例和HTML编码工具，这些都为软件的完整性和易用性做出了贡献。 7. **技术支持与反馈**：用户应将任何问题或建议发送给Dale Skrien，他负责维护和更新这个项目，可以通过电子邮件或访问他的个人网页获取进一步的信息。 CPU Sim是一款富有教育价值的Java软件，它不仅提供了一种直观的方式来学习处理器设计，还展示了Java技术在开发复杂系统中的应用。对于那些想要深入了解计算机体系结构和编程底层原理的用户或教师来说，这是一个不可多得的学习和实验工具。

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summary, each click of “Step by Instr” causes a full machine cycle to be executed,

consisting of the fetch sequence followed by the execute sequence of the instruction that

was fetched. As you step through the execution, note that the next machine instruction

to be executed is highlighted in the RAM window. If you wish, you can edit the

contents of any of the registers or RAM between steps.

Both the fetch sequence and the execute sequence of the instructions that are

fetched are comprised of a series of smaller, more basic steps called “microinstructions”.

The list on right side of the debug toolbar displays the microinstructions making up the

current fetch sequence or instruction.

If you click “Step by Micro” from the toolbar, then only one microinstruction will

execute, namely the microinstruction highlighted in the scrolling list on the right end of

the debug toolbar. If the microinstruction that is executed changes a value in the RAM

or Registers, then the data in the RAM or Registers that is changed during execution is

outlined in green. When this microinstruction finishes execution, you will see that the

next microinstruction that is to be executed becomes highlighted in the scrolling list on

the right end of the debug toolbar, while the current machine instruction remains

highlighted in the RAM window.

If the microinstruction that you execute is the final “end” microinstruction of a

particular machine instruction, then the current machine cycle is ended. A new

machine cycle will begin execution next with the fetch sequence and the scrolling list of

microinstructions will be updated to display the microinstructions in the fetch

sequence. The first microinstruction in the fetch sequence will be highlighted and the

next machine instruction will be highlighted in the RAM window.

You can also return to any previous state by backing up one machine or

microinstruction at a time. To do so, repeatedly choose “Backup one Instr” or “back up

one Micro” from the toolbar. No matter what microinstruction you are currently

executing, if you click “Backup one Instr”, the state of the CPU will revert back to the

state at the beginning of the machine cycle. If you click “Back up one Micro”, the cells

outlined in green in the Registers and RAM windows are updated to reflect those

values that were changed in the previous microinstruction. To set break points in your

code, check the box on the left of any line of code in the Main RAM window. When the

CPU accesses that line of code (for example, when that line is loaded into the CPU for

execution), the program will halt. At that point you can inspect or change any of the

values in the register or RAM windows and resume execution or step forward or

backward.

To learn more about debug mode, see the section of this manual entitled

“EXECUTE MENU - RUNNING A PROGRAM ON THE SIMULATED MACHINE”.

At this point, you have many options. You can continue stepping through the

program one instruction or one microinstruction at a time by clicking the appropriate

button or you can continue execution without stopping by clicking the "Go" button.

Alternatively, you can (a) backup up all the way and run the same program again with

different input, (b) create or load a new assembly language program in a text window,

assemble it, and then run it, (c) create or load a new machine instead of the Wombat1,

or (d) quit.

To quit CPU Sim, just choose “Quit” from the File menu. You may be asked

whether you want to save the changes to the Wombat1 or an assembly language

program. Click “No” for each of these and then CPU Sim will quit running.

CREATING NEW MACHINES IN CPU SIM, A Tour using the Wombat1

To demonstrate how to use CPU Sim to create a new hypothetical machine or

CPU, we will outline the construction of the “Wombat1” machine used in the first tour.

We will only demonstrate some of the principles of constructing a new machine since

completing the whole machine here, especially all the microinstruction and machine

instruction specifications, would be somewhat time consuming.

Start up CPU Sim or, if you left it running after the previous tour, choose “New

machine” from the File menu. The default new machine has no registers, no memory,

and no machine instructions.

The machine we will now construct, the Wombat1, is a single-accumulator

machine using six registers: acc (the accumulator), pc (the program counter), ir (the

instruction register), the mar (memory address register), mdr (the memory data register),

and the status (the status register). The basic structure of the Wombat1 is shown in

Figure 4. The status register is 3 bits wide, the pc and mar are 12 bits wide and the other

three registers are 16 bits wide. The Wombat1 also has a main memory (RAM)

consisting of 128 bytes. The arrows in the figure indicate the movement of data by the

microinstructions.

The pc contains the address of the main memory location that contains the next

instruction to be executed. In the fetch sequence (the first part of every machine cycle),

the next instruction to be executed is copied into the ir, where the instruction is

decoded. Then the instruction is executed, which completes the machine cycle. This is

followed repeatedly by more machine cycles, each consisting again of the execution of

the fetch sequence followed by the execution of a machine instruction.

All computations are done in the acc. The mar and mdr are the registers through

which data is transferred to and from the main memory.

There are 12 machine instructions for the Wombat1, each associated with a 4-bit

opcode. These instructions are: HALT (stop), READ (get input from the user), WRITE

(send output to the user), LOAD (transfer data from the main memory to the acc),

STORE (transfer data from the acc to the main memory), ADD (add a value from the

main memory to the value in the acc, putting the result in the acc), SUBTRACT,

MULTIPLY, DIVIDE (all similar to ADD), JMPZ (if the value in the acc is 0, jump to a

new location to obtain the next instruction to be executed), JMPN (if the value in the acc

is less than 0, jump to a new location to obtain the next instruction to be executed),

JUMP (jump to a new location unconditionally).

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