Published SFF-8472 Rev 11.0
Diagnostic Monitoring Interface for Optical Transceivers Page 7
1. Scope and Overview
This document defines an enhanced memory map with a digital diagnostic monitoring interface
for optical transceivers that allows pseudo real time access to device operating parameters. It
also adds new options to the previously defined two-wire interface ID memory map that
accommodate new transceiver types that were not considered in the SFP MSA or GBIC
documents.
The interface is an extension of the two-wire interface ID interface defined in the GBIC
specification as well as the SFP MSA. Both specifications define a 256 byte memory map in
EEPROM which is accessible over a 2 wire serial interface at the 8 bit address 1010000X
(A0h). The digital diagnostic monitoring interface makes use of the 8 bit address 1010001X
(A2h), so the originally defined two-wire interface ID memory map remains unchanged. The
interface is backward compatible with both the GBIC specification and the SFP MSA.
2. Applicable Documents
Gigabit Interface Converter (GBIC). SFF document number: SFF-8053, rev. 5.5, September 27, 2000.
Small Form Factor Pluggable (SFP) Transceiver, SFF document number INF-8074, rev. 1.0, May 12, 2001
(Based on the initial September 14, 2001 MSA public release).
SFP Rate and Application Selection. SFF document number SFF-8079, rev 1.7, February 2, 2005.
SFP Rate and Application Codes. SFF document number SFF-8089, rev 1.3, February 3, 2005.
Enhanced 8.5 and 10 Gigabit Small Form Factor Pluggable Module (SFP Plus).
SFF document number SFF-8431, rev 1.6, December 21, 2006.
3. Enhanced Digital Diagnostic Interface Definition
Overview
The enhanced digital diagnostic interface is a superset of the MOD_DEF interface defined in
the SFP MSA document dated September 14, 2000, later submitted to the SFF Committee as
INF-8074. The 2 wire interface pin definitions, hardware, and timing are clearly defined there.
This document describes an extension to the memory map defined in the SFP MSA (see
Figure 3.1). The enhanced interface uses the two wire serial bus address 1010001X (A2h) to
provide diagnostic information about the module’s present operating conditions. The
transceiver generates this diagnostic data by digitization of internal analog signals. Calibration
and alarm/warning threshold data is written during device manufacture.
All bits that are unallocated or reserved for SFF-8472 shall be set to zero and/or ignored.
Bits labeled as reserved or optional for other usage, such as for SFF-8079, shall be
implemented per such other documents, or set to zero and/or ignored if not implemented.
If optional features for SFF-8472 are implemented, they shall be implemented as defined in
SFF-8472. If they are not implemented, then write bits will be ignored, and state bits shall be
set to zero.
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