MAX17040/MAX17041
Compact, Low-Cost 1S/2S Fuel Gauges
_______________________________________________________________________________________ 3
Note 1: All voltages are referenced to GND.
Note 2: SDA, SCL = GND; EO, SEO idle.
Note 3: External time base on EO pin must meet this specification.
Note 4: The MAX17040/MAX17041 enter Sleep mode 1.75s to 2.5s after (SCL < V
IL
) AND (SDA < V
IL
).
Note 5: f
SCL
must meet the minimum clock low time plus the rise/fall times.
Note 6: The maximum t
HD:DAT
has only to be met if the device does not stretch the low period (t
LOW
) of the SCL signal.
Note 7: This device internally provides a hold time of at least 75ns for the SDA signal (referred to the V
IHMIN
of the SCL signal) to
bridge the undefined region of the falling edge of SCL.
Note 8: Filters on SDA and SCL suppress noise spikes at the input buffers and delay the sampling instant.
Note 9: C
B
—total capacitance of one bus line in pF.
Note 10: Applies to 8-pin TDFN-EP package type only.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
SCL Clock Frequency f
SCL
(Note 5) 0 400 kHz
Bus Free Time Between a STOP
and START Condition
t
BUF
1.3 µs
Hold Time (Repeated)
START Condition
t
HD:STA
(Note 5) 0.6 µs
Low Period of SCL Clock t
LOW
1.3 µs
High Period of SCL Clock t
HIGH
0.6 µs
Setup Time for a Repeated
START Condition
t
SU:STA
0.6 µs
Data Hold Time t
HD:DAT
(Notes 6, 7) 0 0.9 µs
Data Setup Time t
SU:DAT
(Note 6) 100 ns
Rise Time of Both SDA
and SCL Signals
t
R
20 +
0.1C
B
300 ns
Fall Time of Both SDA
and SCL Signals
t
F
20 +
0.1C
B
300 ns
Setup Time for STOP Condition t
SU:STO
0.6 µs
Spike Pulse Widths Suppressed
by Input Filter
t
SP
(Note 8) 0 50 ns
Capacitive Load for Each
Bus Line
C
B
(Note 9) 400 pF
SCL, SDA Input Capacitance C
BIN
60 pF
ELECTRICAL CHARACTERISTICS: 2-WIRE INTERFACE
(2.5V ≤ V
DD
≤ 4.5V, T
A
= -20°C to +70°C.)
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