汽车级800 MSPS 12位ADC with JESD204C接口技术规格

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7.6 Electrical Characteristics: Power Consumption

typical values at T

= 25°C, VA19 = 1.9 V, VPLL19 = 1.9 V, VREFO = 1.9 V, VTRIG = 1.1V, VA11 = 1.1 V, VD11 = 1.1

V, default full-scale voltage (V

= 0.8 V

), f

= 97 MHz, A

= –1 dBFS, f

CLK

= 800 MHz, filtered 1 V

sine-wave clock

applied to CLK±, PLL disabled, JMODE = 0, High Performance Mode and foreground calibration (unless otherwise noted);

minimum and maximum values are at nominal supply voltages and over the operating free-air temperature range provided in

the Recommended Operating Conditions table

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

VA19

1.9-V analog supply current

Power mode 1a: Quad channel, JMODE

0 (12-bit, 8 lanes, 8B/10B encoding), FG

calibration, PLL_EN = 0, f

= 0.8 GSPS,

High Performance Mode

655 mA

VPLL19

PLL analog supply current 0 mA

VREFO

PLLREFO± analog supply current 0 mA

VTRIG

TRIGOUT± analog supply current 0 mA

VA11

1.1-V analog supply current 465 mA

VD11

1.1-V digital supply current 395 mA

DIS

Power dissipation 2.18 W

VA19

1.9-V analog supply current

Power mode 1b: Dual channel, JMODE

0 (12-bit, 4 lanes, 8B/10B encoding), FG

calibration, PLL_EN = 0,0.8 GSPS, High

Performance Mode

390 mA

VPLL19

PLL analog supply current 0 mA

VREFO

PLLREFO± analog supply current 0 mA

VTRIG

TRIGOUT± analog supply current 0 mA

VA11

1.1-V analog supply current 350 mA

VD11

1.1-V digital supply current 250 mA

DIS

Power dissipation 1.41 W

VA19

1.9-V analog supply current

Power mode 1c: Single channel, JMODE

0 (12-bit, 2 lanes, 8B/10B encoding), FG

calibration, PLL_EN = 0, f

= 0.8 GSPS,

High Performance Mode

253 mA

VPLL19

PLL analog supply current 0 mA

VREFO

PLLREFO± analog supply current 0 mA

VTRIG

TRIGOUT± analog supply current 0 mA

VA11

1.1-V analog supply current 316 mA

VD11

1.1-V digital supply current 160 mA

DIS

Power dissipation 1.01 W

VA19

1.9-V analog supply current

Power mode 2a: Quad channel, JMODE

8 (12-bit, 4 lanes, 64B/66B encoding),

LPBG calibration, PLL_EN = 0, f

= 0.8

GSPS, Low Power Mode

565 mA

VPLL19

PLL analog supply current 0 mA

VREFO

PLLREFO± analog supply current 0 mA

VTRIG

TRIGOUT± analog supply current 0 mA

VA11

1.1-V analog supply current 355 mA

VD11

1.1-V digital supply current 330 mA

DIS

Power dissipation 1.83

(1)

VA19

1.9-V analog supply current

Power mode 2b: Dual channel, JMODE

8 (12-bit, 2 lanes, 64B/66B encoding),

LPBG calibration, PLL_EN = 0, f

= 0.8

GSPS, Low Power Mode

345 mA

VPLL19

PLL analog supply current 0 mA

VREFO

PLLREFO± analog supply current 0 mA

VTRIG

TRIGOUT± analog supply current 0 mA

VA11

1.1-V analog supply current 306 mA

VD11

1.1-V digital supply current 198 mA

DIS

Power dissipation 1.19

(1)

VA19

1.9-V analog supply current

Power mode 2c: Single channel, JMODE

8 (12-bit, 1 lanes, 64B/66B encoding),

LPBG calibration, PLL_EN = 0, f

= 0.8

GSPS, Low Power Mode

235 mA

VPLL19

PLL analog supply current 0 mA

VREFO

PLLREFO± analog supply current 0 mA

VTRIG

TRIGOUT± analog supply current 0 mA

VA11

1.1-V analog supply current 283 mA

VD11

1.1-V digital supply current 146 mA

DIS

Power dissipation 0.92

(1)

ADC12QJ800-Q1, ADC12DJ800-Q1, ADC12SJ800-Q1

SBASA52 – JULY 2021

www.ti.com

16 Submit Document Feedback

Product Folder Links: ADC12QJ800-Q1 ADC12DJ800-Q1 ADC12SJ800-Q1

7.6 Electrical Characteristics: Power Consumption (continued)

typical values at T

= 25°C, VA19 = 1.9 V, VPLL19 = 1.9 V, VREFO = 1.9 V, VTRIG = 1.1V, VA11 = 1.1 V, VD11 = 1.1

V, default full-scale voltage (V

= 0.8 V

), f

= 97 MHz, A

= –1 dBFS, f

CLK

= 800 MHz, filtered 1 V

sine-wave clock

applied to CLK±, PLL disabled, JMODE = 0, High Performance Mode and foreground calibration (unless otherwise noted);

minimum and maximum values are at nominal supply voltages and over the operating free-air temperature range provided in

the Recommended Operating Conditions table

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

VA19

1.9-V analog supply current

Power mode 3a: Quad channel,

JMODE 8 (12-bit, 4 lanes, 64B/66B

encoding), LPBG calibration, PLL_EN =

1, PLLREF_SE = 1, f

REF

= 50 MHz,

TRIGOUT± enabled, f

= 0.8 GSPS, Low

Power Mode

565 mA

VPLL19

PLL analog supply current 60 mA

VREFO

PLLREFO± analog supply current 13 mA

VTRIG

TRIGOUT± analog supply current 5.5 mA

VA11

1.1-V analog supply current 340 mA

VD11

1.1-V digital supply current 328 mA

DIS

Power dissipation 1.96

(1)

VA19

1.9-V analog supply current

Power mode 3b: Dual channel,

JMODE 8 (12-bit, 2 lanes, 64B/66B

encoding), LPBG calibration, PLL_EN =

1, PLLREF_SE = 1, f

REF

= 50 MHz,

TRIGOUT± enabled, f

= 0.8 GSPS, Low

Power Mode

345 mA

VPLL19

PLL analog supply current 59 mA

VREFO

PLLREFO± analog supply current 13 mA

VTRIG

TRIGOUT± analog supply current 5.5 mA

VA11

1.1-V analog supply current 290 mA

VD11

1.1-V digital supply current 198 mA

DIS

Power dissipation 1.34

(1)

VA19

1.9-V analog supply current

Power mode 3c: Single channel,

JMODE 8 (12-bit, 1 lanes, 64B/66B

encoding), LPBG calibration, PLL_EN =

1, PLLREF_SE = 1, f

REF

= 50 MHz,

TRIGOUT± enabled, f

= 0.8 GSPS, Low

Power Mode

236 mA

VPLL19

PLL analog supply current 60 mA

VREFO

PLLREFO± analog supply current 13 mA

VTRIG

TRIGOUT± analog supply current 5.5 mA

VA11

1.1-V analog supply current 270 mA

VD11

1.1-V digital supply current 146 mA

DIS

Power dissipation 1.05

(1)

VA19

1.9-V analog supply current

Power mode 4a: Quad channel, JMODE

7 (8-bit, 4 lanes, 64B/66B encoding), FG

calibration, PLL_EN = 0, f

= 0.8 GSPS,

Low Power Mode

543 mA

VPLL19

PLL analog supply current 0 mA

VREFO

PLLREFO± analog supply current 0 mA

VTRIG

TRIGOUT± analog supply current 0 mA

VA11

1.1-V analog supply current 333 mA

VD11

1.1-V digital supply current 247 mA

DIS

Power dissipation 1.66 W

VA19

1.9-V analog supply current

Power mode 4b: Dual channel, JMODE

7 (8-bit, 2 lanes, 64B/66B encoding), FG

calibration, PLL_EN = 0, f

= 0.8 GSPS,

Low Power Mode

333 mA

VPLL19

PLL analog supply current 0 mA

VREFO

PLLREFO± analog supply current 0 mA

VTRIG

TRIGOUT± analog supply current 0 mA

VA11

1.1-V analog supply current 285 mA

VD11

1.1-V digital supply current 149 mA

DIS

Power dissipation 1.11 W

VA19

1.9-V analog supply current

Power mode 4c: Single channel, JMODE

7 (8-bit, 1 lanes, 64B/66B encoding), FG

calibration, PLL_EN = 0, f

= 0.8 GSPS,

Low Power Mode

225 mA

VPLL19

PLL analog supply current 0 mA

VREFO

PLLREFO± analog supply current 0 mA

VTRIG

TRIGOUT± analog supply current 0 mA

VA11

1.1-V analog supply current 260 mA

VD11

1.1-V digital supply current 110 mA

DIS

Power dissipation 0.83 W

www.ti.com

ADC12QJ800-Q1, ADC12DJ800-Q1, ADC12SJ800-Q1

SBASA52 – JULY 2021

Submit Document Feedback

Product Folder Links: ADC12QJ800-Q1 ADC12DJ800-Q1 ADC12SJ800-Q1

7.6 Electrical Characteristics: Power Consumption (continued)

typical values at T

= 25°C, VA19 = 1.9 V, VPLL19 = 1.9 V, VREFO = 1.9 V, VTRIG = 1.1V, VA11 = 1.1 V, VD11 = 1.1

V, default full-scale voltage (V

= 0.8 V

), f

= 97 MHz, A

= –1 dBFS, f

CLK

= 800 MHz, filtered 1 V

sine-wave clock

applied to CLK±, PLL disabled, JMODE = 0, High Performance Mode and foreground calibration (unless otherwise noted);

minimum and maximum values are at nominal supply voltages and over the operating free-air temperature range provided in

the Recommended Operating Conditions table

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

VA19

1.9-V analog supply current

Power mode 5a: Quad channel, JMODE

0 (12-bit, 8 lanes, 8B/10B encoding), BG

calibration, PLL_EN = 1, PLLREF_SE = 0,

REF

= 50 MHz, TRIGOUT± enabled, f

0.8 GSPS, High Performance Mode

804 mA

VPLL19

PLL analog supply current 60 mA

VREFO

PLLREFO± analog supply current 13 mA

VTRIG

TRIGOUT± analog supply current 5.5 mA

VA11

1.1-V analog supply current 527 mA

VD11

1.1-V digital supply current 389 mA

DIS

Power dissipation 2.67 W

VA19

1.9-V analog supply current

Power mode 5b: Dual channel, JMODE

0 (12-bit, 4 lanes, 8B/10B encoding), BG

calibration, PLL_EN = 1, PLLREF_SE =

0, f

REF

= 50 MHz, TRIGOUT± enabled, 0.8

GSPS, High Performance Mode

526 mA

VPLL19

PLL analog supply current 59 mA

VREFO

PLLREFO± analog supply current 13 mA

VTRIG

TRIGOUT± analog supply current 5.5 mA

VA11

1.1-V analog supply current 395 mA

VD11

1.1-V digital supply current 248 mA

DIS

Power dissipation 1.86 W

VA19

1.9-V analog supply current

Power mode 5c: Single channel, JMODE

0 (12-bit, 2 lanes, 8B/10B encoding), BG

calibration, PLL_EN = 1, PLLREF_SE = 0,

REF

= 50 MHz, TRIGOUT± enabled, f

0.8 GSPS, High Performance Mode

386 mA

VPLL19

PLL analog supply current 59 mA

VREFO

PLLREFO± analog supply current 13 mA

VTRIG

TRIGOUT± analog supply current 5.5 mA

VA11

1.1-V analog supply current 370 mA

VD11

1.1-V digital supply current 158 mA

DIS

Power dissipation 1.46 W

VA19

1.9-V analog supply current

Power mode 6: Power-down enabled (PD

= 1)

47 mA

VPLL19

PLL analog supply current 0 mA

VREFO

PLLREFO± analog supply current 0 mA

VTRIG

TRIGOUT± analog supply current 0 mA

VA11

1.1-V analog supply current 35 mA

VD11

1.1-V digital supply current 33 mA

DIS

Power dissipation 0.155 W

(1) Low-power background (LPBG) calibration supply current and power dissipation numbers are in the calibration sleep state. The power

dissipation in this mode increases to the background (BG) calibration power consumption during the calibration state. The sleep period

can be controlled by the user and long sleep periods will average out the calibration state power dissipation contribution.

ADC12QJ800-Q1, ADC12DJ800-Q1, ADC12SJ800-Q1

SBASA52 – JULY 2021

www.ti.com

18 Submit Document Feedback

Product Folder Links: ADC12QJ800-Q1 ADC12DJ800-Q1 ADC12SJ800-Q1

7.7 Electrical Characteristics: AC Specifications

typical values at T

= 25°C, VA19 = 1.9 V, VPLL19 = 1.9 V, VREFO = 1.9 V, VTRIG = 1.1V, VA11 = 1.1 V, VD11 = 1.1

V, default full-scale voltage (V

= 0.8 V

), f

= 97 MHz, A

= –1 dBFS, f

CLK

= 800 MHz, filtered 1 V

sine-wave clock

applied to CLK±, PLL disabled, JMODE = 0, High Performance Mode and foreground calibration (unless otherwise noted);

minimum and maximum values are at nominal supply voltages and over the operating free-air temperature range provided in

the Recommended Operating Conditions table

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

FPBW

Full-power input bandwidth

(–3 dB)

(1)

Foreground calibration 6

GHz

Background calibration 6

XTALK

Channel-to-channel

crosstalk

(Quad and dual channel

only)

Aggressor = 400 MHz, –1 dBFS –81

dBAggressor = 1 GHz, –1 dBFS –68

Aggressor = 3 GHz, –1 dBFS –59

CER Code error rate

Maximum CER, does not include JESD204C interface

BER

–18

Errors/

sample

ORR

Overrange recovery time

Time from an overdriven input to accurate conversion

after a step from a ±1.2 V

PP-DIFF

overdriven input

stepped to 0 V

PP-DIFF

1 t

CLK

cycles

NOISE

DC input noise standard

deviation

No input, foreground calibration, excludes DC offset 1.8 LSB

NSD Noise spectral density

Maximum full-scale voltage (V

= 1.0 V

), A

= –20

dBFS

–146.1

dBFS/Hz

Default full-scale voltage (V

= 0.8 V

), A

= –20

dBFS

–144.7

NF Noise figure, Z

= 100 Ω

Maximum full-scale voltage (V

= 1.0 V

), A

= –20

dBFS

29.3

Default full-scale voltage (V

= 0.8 V

), A

= –20

dBFS

27.9

SNR

Signal-to-noise ratio,

excluding DC, HD2 to HD9

= 97 MHz

= –1 dBFS 57.6

dBFS

= –3 dBFS 57.8

= –12 dBFS 58.2

= –3 dBFS, V

= 1.0 V

58.8

= 497 MHz

= –1 dBFS 57.6

= –3 dBFS 57.8

= –12 dBFS 58.1

= 997 MHz

= –1 dBFS 54 57.3

= –3 dBFS 57.7

= –12 dBFS 57.4

= –3 dBFS, V

= 1.0 V

57.7

= 1797 MHz

= –1 dBFS 57.0

= –3 dBFS 57.3

= –12 dBFS 58.0

= 2697 MHz

= –1 dBFS 56.1

= –3 dBFS 56.9

= –12 dBFS 57.9

= 3497 MHz

= –1 dBFS 55.6

= –3 dBFS 56.3

= –12 dBFS 57.8

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ADC12QJ800-Q1, ADC12DJ800-Q1, ADC12SJ800-Q1

SBASA52 – JULY 2021

Submit Document Feedback

Product Folder Links: ADC12QJ800-Q1 ADC12DJ800-Q1 ADC12SJ800-Q1

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