Symbolic Computation of SNR for Variational
Analysis of Sigma-Delta Modulator
∗
Jiandong Cheng and Guoyong Shi
School of Microelectronics, Shanghai Jiao Tong University,
Shanghai 200240, China
shiguoyong@ic.sjtu.edu.cn
Abstract—Signal-to-noise ratio (SNR) is an important de-
sign metric for switched-capacitor sigma-delta modulators (SC-
SDMs). In an automatic synthesis environment, fast SNR com-
putation is of paramount importance. So far the main SNR
computation method has been behavioral simulation. Other
less accurate methods are based on empirical formulas. These
methods could not contribute too much to the enhancement of
synthesis efficiency. In this work a highly efficient and purely
symbolic SNR computation method is proposed. The difficulty in
the computation of noise power (requiring integration of a ratio-
nal function) is overcome by Taylor polynomial approximation.
Together with a symbolic loop-transfer analysis tool, the SNR can
be computed fully symbolically. This novel computation method
is applied to variational SC-SDM analysis. The effectiveness and
efficiency are compared to behavioral Monte Carlo simulation
results.
Index Terms—Sigma-delta modulator (SDM), statistical anal-
ysis, switched-capacitor (SC), symbolic analysis, signal-to-noise
ratio (SNR), Taylor approximation.
I. INTRODUCTION
ΣΔ modulator (SDM) is an important category of data
converters widely applied in high performance analog signal
processing [1]–[4]. Comparing to continuous-time implemen-
tation, switched-capacitor (SC) based discrete-time implemen-
tation is more popular due to its low fabrication cost. However,
design and verification of SC-SDMs is not easy because of its
mixed-mode (discrete and continuous-time) and mixed-signal
nature. It is well-known that a fully transistor-level SPICE
simulation of a practical SC-SDM design is extremely time-
consuming. Hence, most of the automatic synthesis strategies
proposed in the literature would not suggest fully SPICE-
based simulation for the category of sigma-delta data con-
verters.
A complete synthesis cycle would have to go through op-
timizations ranging from device sizes to modulator topology.
Because of the importance of the related subjects, numerous
publications have made attempts on studying many difficult
problems from various angles [5]–[15].
Recently, the rising concern of process variation has caught
the attention of researchers working on mixed-signal design
automation [16]. Process variation causes severe variation in
the SNR perfo rmance of SC-SDMs. From the design reli-
ability perspective, optimizing the SNR performance during
∗
This research was supported in part by the National Natural Science
Foundation of China (NSFC Grant No. 61176129) and by the SJTU-Synopsys
Joint Research Project (2010-2013) sponsored by Synopsys, Inc.
the synthesis cycle is highly important. So far only very few
publications have addressed the SNR variation issues in the
design of SDMs [12], [13], [17], [18].
Tang [17] proposed a symbolic SNR characterization
method by calculating the SNR variance based on its first-
order sensitivity with respect to capacitance variations. How-
ever, since the computation of noise power requires the integra-
tion o f a noise tran sfer function (NTF), numerical integration
is employed in the work [17].
Empirical approximations of SNR also are used in some
publications. For example, extensive simulation is n eeded to
fit parameters in [7] and rough pole-zero approximation is
introduced in [19].
In this work a fully symbolic SNR computation strategy is
developed with the following two innovations: 1) A symbolic
tool is introduced for creating the loop transfer functions of
modulators of arbitrary topology; and 2) a Taylor polynomial
approximation method is proposed for the symbolic calculation
of noise power. The new method eliminates the need of
repeated numerical integration as required by the method pro-
posed in [17]. Hence, this novel symbolic SNR computation
method can be applied as an efficient computation engine for
SDM synthesis considering SNR and/or, in particular, SNR
variation.
In Section II we first make a preliminary review on the
design issues involved with SC-SDM, then outline the steps
for generating symbolic loop-transfer function. In Section III
we present a Taylor approximate method for symbolically
calculating SNR. Based on a symbo lically generated SNR, we
then present a procedure for calculating the sensitivity of SNR
with respect to circuit parameters. SNR sensitivity has many
applications. In this work we only present a first-order method
for predicting SNR variation in Section IV due to sp ace limit.
The accuracy of the proposed Taylor approximation method
for SNR computation a nd the reliability of u sin g the first-order
approximation for SNR variation estimation are validated by
experiments reported in Section V. A conclusion is drawn in
Section VI.
II. SDM D
ESIGN ISSUES AND SYMBOLIC SOLUTIONS
A. SDM Review
The idea of SDM is to achieve h igh quantization resolution
by employing low-resolution intern al ADCs via oversampling
and filtering (noise-shaping). The resolution of internal ADC
978-1-4799-2816-3/14/$31.00 ©2014 IEEE
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