MC 3487: 一款符合TIA/EIA-422-B和ITU V.11标准的高速差分驱动器
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更新于2024-07-23
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MC 3487是一款专为满足ANSI TIA/EIA-422-B标准以及ITU Recommendation V.11设计的高性能差动驱动器。它由四路独立的差分线驱动器组成，这些驱动器具有TTL兼容输入，旨在降低电流消耗并减少外部负载的影响。每个驱动器内部都包含一个输入缓冲器，这使得信号在传输过程中保持清晰且稳定。
这款器件的特点包括快速的转换时间，确保了数据传输的高速性和准确性。它的输出采用3-状态电路设计，这意味着在输出使能信号处于低电平时，即使所有差分输出对都处于高阻抗状态，从而实现有效的信号隔离，避免噪声干扰。这种特性对于噪声敏感的应用至关重要。
MC 3487还具备电源上电和掉电保护功能，内置电路可以在电源切换期间自动进入高阻抗状态，无需额外的外部处理，从而保护系统免受瞬态电压的影响。这提高了系统的可靠性和稳定性。
为了优化与MC 3486四线接收器的配合，MC 3487设计为单5V供电，节省了电源需求，并确保了在整个工作范围内的高效运行。它采用紧凑的16引脚双列直插式封装（DIP），便于集成到各种电路板设计中。
MC 3487是一款理想的解决方案，适用于那些需要高质量、高速度和低噪声传输的通信系统，特别是在串行通信应用中，如RS-232或RS-422接口，它提供了卓越的性能和易用性。
SLLS098C − MAY 1980 − REVISED FEBRUARY 2004
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN MAX UNIT
V
IK
Input clamp voltage I
I
= −18 mA −1.5 V
V
OH
High-level output voltage V
IL
= 0.8 V, V
IH
= 2 V, I
OH
= −20 mA 2.5 V
V
OL
Low-level output voltage V
IL
= 0.8 V, V
IH
= 2 V, I
OL
= 48 mA 0.5 V
|V
OD
| Differential output voltage R
L
= 100 Ω, See Figure 1 2
∆|V
OD
|
Change in magnitude of
†
R
L
= 100 Ω,
See Figure 1
±0.4
V
∆|V
OD
|
Change in magnitude of
differential output voltage
†
R
L
= 100 Ω, See Figure 1 ±0.4 V
V
OC
Common-mode output voltage
‡
R
L
= 100 Ω, See Figure 1 3 V
∆|V
OC
|
Change in magnitude of
†
R
L
= 100 Ω,
See Figure 1
±0.4
V
∆|V
OC
|
Change in magnitude of
common-mode output voltage
†
R
L
= 100 Ω,
See Figure 1 ±0.4 V
I
O
Output current with power off
V
CC
= 0
V
O
= 6 V 100
A
I
O
Output current with power off V
CC
= 0
V
O
= −0.25 V −100
µA
I
OZ
High-impedance-state output current
Output enables at 0.8 V
V
O
= 2.7 V 100
A
I
OZ
High-impedance-state output current Output enables at 0.8 V
V
O
= 0.5 V −100
µA
I
I
Input current at maximum input
voltage
V
I
= 5.5 V 100 µA
I
IH
High-level input current V
I
= 2.7 V 50 µA
I
IL
Low-level input current V
I
= 0.5 V −400 µA
I
OS
Short-circuit output current
§
V
I
= 2 V −40 −140 mA
I
CC
Supply current (all drivers)
Outputs disabled 105
mA
I
CC
Supply current (all drivers)
Outputs enabled, No load 85
mA
†
∆|V
OD
| and ∆|V
OC
| are the changes in magnitude of V
OD
and V
OC
, respectively, that occur when the input is changed from a high level to a low
level.
‡
In ANSI Standard TIA/EIA-422-B, V
OC
, which is the average of the two output voltages with respect to ground, is called output offset voltage,
V
OS
.
§
Only one output at a time should be shorted, and duration of the short circuit should not exceed one second.
switching characteristics over recommended operating free-air temperature range, V
CC
= 5 V
PARAMETER TEST CONDITIONS MIN MAX UNIT
t
PLH
Propagation delay time, low- to high-level output
C
L
= 15 pF,
See Figure 2
20
ns
t
PHL
Propagation delay time, high- to low-level output
C
L
= 15 pF,
See Figure 2
20
ns
t
sk
Skew time C
L
= 15 pF, See Figure 2 6 ns
t
t(OD)
Differential-output transition time C
L
= 15 pF, See Figure 3 20 ns
t
PZH
Output enable time to high level
C
L
= 50 pF,
See Figure 4
30
ns
t
PZL
Output enable time to low level
C
L
= 50 pF,
See Figure 4
30
ns
t
PHZ
Output disable time from high level
C
L
= 50 pF,
See Figure 4
25
ns
t
PLZ
Output disable time from low level
C
L
= 50 pF,
See Figure 4
30
ns
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