TI BUF12800：12通道gamma校正电压参考发生器

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"TI-BUF12800是一款12通道gamma校正电压参考发生器，适用于TFT-LCD面板动态gamma校正，每个输出具有10位分辨率。该器件集成了双缓冲DAC寄存器、参考缓冲器，提供轨到轨输出，并具有低功耗特性，每通道供应电流仅为900µA。它可在7V至18V的电源电压下工作，数字电源电压范围为2.3V至5.5V。此外，该器件支持工业标准的两线接口，高速模式下可达3.4MHz的工作频率，并具有高ESD耐受能力，包括4kV HBM、1kV CDM和200V MM。该设备还提供了演示板和软件支持。" TI-BUF12800是德州仪器（TI）推出的一款高性能模拟集成电路，主要用于TFT-LCD面板的参考驱动器和电压生成器，同时也在工业过程控制中发挥作用。其主要特点包括： 1. **12通道Gamma校正**：该器件提供12个独立的可编程输出通道，每个通道都具备10位分辨率，能够实现精确的电压控制，这对于显示器的色彩校正至关重要。 2. **双缓冲DAC寄存器**：每个通道都有自己的数字模拟转换器（DAC），确保了数据处理的高效性和准确性，同时减小了信号延迟。 3. **集成参考缓冲器**：内置的参考缓冲器可以提供稳定的参考电压，确保输出电压的精度和一致性。 4. **轨到轨输出**：BUF12800能提供从电源电压的最小值到最大值的全范围输出，增强了电压调节的灵活性。 5. **低功耗设计**：每个通道的供电电流仅为900微安，使得整体系统能耗降低，适合在电池供电或对能耗敏感的应用中使用。 6. **宽电源电压范围**：7V至18V的电源电压适应性广泛，能够满足不同应用场景的需求。 7. **数字接口**：采用工业标准的两线接口（I²C），支持高速模式，最高工作频率可达3.4MHz，便于与微控制器等数字系统集成。 8. **高ESD防护**：具有4kV人体模型（HBM）、1kV充电设备模型（CDM）和200V机器模型（MM）的静电放电保护等级，增强了在恶劣环境下的可靠性。 9. **附加资源**：TI提供了配套的演示板和软件工具，简化了设计和调试过程，帮助用户快速评估和应用BUF12800。 TI-BUF12800是TFT-LCD显示系统和其他工业控制应用的理想选择，它的高分辨率、低功耗和高集成度特性使其在同类产品中脱颖而出。通过灵活的配置和强大的功能，设计人员可以轻松实现精确的电压控制，从而优化显示性能和提升系统的整体效率。

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SBOS315D − DECEMBER 2004 − REVISED DECEMBER 2007

www.ti.com

APPLICATIONS INFORMATION

The BUF12800 programmable voltage reference allows fast

and easy adjustment of 12 programmable reference outputs,

each with 10-bit resolution. It allows very simple,

time-efficient adjustment of the gamma reference voltages.

The BUF12800 is programmed through a high-speed

standard two-wire interface. The BUF12800 features a

double-register structure for each DAC channel to simplify

the implementation of dynamic gamma control (see the

Dynamic Control section). This allows pre-loading of register

data and rapid updating of all channels simultaneously.

Buffers A−F are able to swing to within 300mV of the

positive supply rail, and to within 1.1V of the negative

supply rail. Buffers G−L are able to swing to within 1.7V

of the positive supply rail, and to within 300mV of the

negative supply rail. (See the Electrical Characteristics

table for further information).

Each buffer is capable of full-scale change in output

voltage in less than 4µs; see Figure 4, typical

characteristic Full-Scale Output Swing.

The BUF12800 uses an analog supply of 7V to 18V and a

digital supply of 2.3V to 5.5V. The digital supply must be

applied prior to or simultaneously with the analog supply

to avoid excessive current and power consumption;

damage to the device may occur if it is left connected only

to the analog supply for an extended time.

Figure 7 shows the BUF12800 in a typical configuration.

In this configuration, the BUF12800 device address is 74h.

The output of each DAC is immediately updated as soon

as data are received in the corresponding register (LD = 0).

For maximum dynamic range, set V

REFH

= V

− 0.2V and

REFL

= V

+ 0.2V.

(1)

RC combination optional.

(2)

GND

and GND

are internally connected and must be at the same voltage potential.

REFH

SCL

SDA

GND

(2)

REFL

GND

(2)

GND

(2)

Out L

Out K

Out J

Out I

Out H

Out G

Out F

Out E

Out D

Out C

Out B

Out A

Source

Driver

Timing

Controller

3.3V

10µF 100nF

BUF12800

(1)

100nF1µF

(1)

Figure 7. Typical Application Configuration

"#$%&''

SBOS315D − DECEMBER 2004 − REVISED DECEMBER 2007

www.ti.com

TWO-WIRE BUS OVERVIEW

The BUF12800 communicates through an industry-stan-

dard, two-wire interface to receive data in slave mode. This

standard uses a two-wire, open-drain interface that supports

multiple devices on a single bus. Bus lines are driven to a

logic low level only. The device that initiates the

communication is called a master, and the devices controlled

by the master are slaves. The master generates the serial

clock on the clock signal line (SCL), controls the bus access,

and generates the START and STOP conditions.

To address a specific device, the master initiates a START

condition by pulling the data signal line (SDA) from a HIGH

to LOW logic level while SCL is HIGH. All slaves on the bus

shift in the slave address byte, with the last bit indicating

whether a read or write operation is intended. During the

ninth clock pulse, the slave being addressed responds to

the master by generating an Acknowledge and pulling

SDA LOW.

Data transfer is then initiated and 8 bits of data are sent

followed by an Acknowledge Bit. During data transfer,

SDA must remain stable while SCL is HIGH. Any change

in SDA while SCL is HIGH will be interpreted as a START

or STOP condition.

Once all data has been transferred, the master generates

a STOP condition indicated by pulling SDA from LOW to

HIGH while SCL is HIGH.

The BUF12800 can act only as a slave device; therefore,

it never drives SCL. SCL is an input only for the BUF12800.

ADDRESSING THE BUF12800

The address of the BUF12800 is 111010x, where x is the

state of the A0 pin. When the A0 pin is LOW, the device will

acknowledge on address 74h (1110100). If the A0 pin is

HIGH, the device will acknowledge on address 75h

(1110101).

Other valid addresses are possible through a simple mask

change. Contact your TI representative for information.

DATA RATES

The two-wire bus operates in one of three speed modes:

D Standard: allows a clock frequency of up to 100kHz;

D Fast: allows a clock frequency of up to 400kHz; and

D High-speed mode (also called Hs mode): allows a

clock frequency of up to 3.4MHz.

The BUF12800 is fully compatible with all three modes. No

special action is required to use the device in Standard or

Fast modes, but High-speed mode must be activated. To

activate High-speed mode, send a special address byte of

00001xxx, with SCL = 400kHz, following the START

condition; xxx are bits unique to the Hs-capable master,

which can be any value. The BUF12800 will respond to the

High-speed mode command regardless of the value of these

last three bits. This byte is called the Hs master code. (Note

that this is different from normal address bytes—the low bit

does not indicate read/write status.) The BUF12800 will not

acknowledge this byte; the communication protocol prohibits

acknowledgment of the Hs master code. On receiving a

master code, the BUF12800 will switch on its Hs mode filters,

and communicate at up to 3.4MHz. Additional high-speed

transfers may be initiated without resending the Hs mode

byte by generating a repeat START without a STOP. The

BUF12800 will switch out of Hs mode at the first occurrence

of a STOP condition.

GENERAL CALL RESET AND POWER-UP

The BUF12800 responds to a General Call Reset, which is

an address byte of 00h (0000 0000) followed by a data byte

of 06h (0000 0110). The BUF12800 acknowledges both

bytes. Upon receiving a General Call Reset, the BUF12800

performs a full internal reset, as though it had been powered

off and then on. It always acknowledges the General Call

address byte of 00h (0000 0000), but does not acknowledge

any General Call data bytes other than 06h (0000 0110).

When the BUF12800 powers up, it automatically performs

a reset. As part of the reset, the BUF12800 is configured

based on the codes shown in Table 1.

Table 1. BUF12800 Reset Codes

RESET CODES

BUFFER (Hex) (Decimal) (Binary)

BUFFER A Code 3E0 992 11 1110 0000

BUFFER B Code 360 864 11 0110 0000

BUFFER C Code 320 800 11 0010 0000

BUFFER D Code 300 768 11 0000 0000

BUFFER E Code 2C0 704 10 1100 0000

BUFFER F Code 240 576 10 0100 0000

BUFFER G Code 1C0 448 01 1100 0000

BUFFER H Code 140 320 01 0100 0000

BUFFER I Code 100 256 01 0000 0000

BUFFER J Code 0E0 224 00 1110 0000

BUFFER K Code 0A0 160 00 1010 0000

BUFFER L Code 020 32 00 0010 0000

Buffer values are calculated using Equation 1:

OUT

REFH

* V

REFL

1024

decimal value of code

) V

REFL

Other reset values are available as a custom

modification—contact your TI representative for details.

OUTPUT VOLTAGE

Buffer output values are determined by the reference

voltages (V

REFH

and V

REFL

) and the decimal value of the

binary input code used to program that buffer. The value is

calculated using Equation 1; see the Reset and Power-Up

section. The valid voltage ranges for the reference

voltages are:

4V v V

REFH

v V

* 0.2V and 0.2V v V

REFL

v V

* 4V

The BUF12800 outputs are capable of a full-scale voltage

output change in less than 4µs—no intermediate steps are

required.

(1)

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