Table of Contents
H5 Datasheet(Revision 1.0) Copyright© 2016 Allwinner Technology Co.,Ltd. All Rights Reserved. Page 20
7.2.6. TCON1 Module Register List ................................................................................................................... 433
7.2.7. TCON1 Module Register Description ...................................................................................................... 433
7.2.7.1. TCON Global Control Register (Default Value: 0x0000_0000) ...................................................... 433
7.2.7.2. TCON Global Interrupt Register0 (Default Value: 0x0000_0000) ................................................. 434
7.2.7.3. TCON Global Interrupt Register1 (Default Value: 0x0000_0000) ................................................. 434
7.2.7.4. TCON1 Control Register (Default Value: 0x0000_0000) ............................................................... 435
7.2.7.5. TCON1 Basic Timing Register0 (Default Value: 0x0000_0000) ..................................................... 435
7.2.7.6. TCON1 Basic Timing Register1 (Default Value: 0x0000_0000) ..................................................... 435
7.2.7.7. TCON1 Basic Timing Register2 (Default Value: 0x0000_0000) ..................................................... 436
7.2.7.8. TCON1 Basic Timing Register3 (Default Value: 0x0000_0000) ..................................................... 436
7.2.7.9. TCON1 Basic Timing Register (Default Value: 0x0000_0000) ....................................................... 436
7.2.7.10. TCON1 Basic Timing Register5 (Default Value: 0x0000_0000) ................................................... 436
7.2.7.11. TCON1 SYNC Register (Default Value: 0x0000_0000) ................................................................ 437
7.2.7.12. TCON1 IO Polarity Register (Default Value: 0x0000_0000) ........................................................ 437
7.2.7.13. TCON1 IO Trigger Register (Default Value: 0x0FFF_FFFF)........................................................... 438
7.2.7.14. TCON ECC FIFO Register (Default Value: UDF) ............................................................................ 438
7.2.7.15. TCON CEU Control Register (Default Value: 0x0000_0000) ....................................................... 439
7.2.7.16. TCON CEU Coefficient MUL Register (Default Value: 0x0000_0000) ......................................... 439
7.2.7.17. TCON CEU Coefficient Add Register (Default Value: 0x0000_0000) ........................................... 439
7.2.7.18. TCON CEU Coefficient Rang Register (Default Value: 0x0000_0000) ......................................... 440
7.2.7.19. TCON Safe Period Register (Default Value: 0x0000_0000) ......................................................... 440
7.2.7.20. TCON1 Fill Control Register (Default Value: 0x0000_0000) ....................................................... 440
7.2.7.21. TCON1 Fill Begin Register (Default Value: 0x0000_0000) .......................................................... 441
7.2.7.22. TCON1 Fill End Register (Default Value: 0x0000_0000) ............................................................. 441
7.2.7.23. TCON1 Fill Data Register (Default Value: 0x0000_0000) ............................................................ 441
Chapter 8 Audio ............................................................................................................................................................. 442
8.1. Audio Codec ....................................................................................................................................................... 443
8.1.1. Overview ................................................................................................................................................. 443
8.1.2. Block Diagram ......................................................................................................................................... 443
8.1.3. Operations and Functional Descriptions ................................................................................................. 444
8.1.3.1. External Signals ............................................................................................................................ 444
8.1.3.2. Clock Sources................................................................................................................................ 445
8.1.3.3. Reset System ................................................................................................................................ 445
8.1.3.4. Power Domain .............................................................................................................................. 446
8.1.4. Register List ............................................................................................................................................. 447
8.1.5. Register Description ................................................................................................................................ 450
8.1.5.1. 0x00 DAC Digital Part Control Register(Default Value: 0x0000_0000) ......................................... 450
8.1.5.2. 0x04 DAC FIFO Control Register (Default Value: 0x0000_4000) .................................................. 451
8.1.5.3. 0x08 DAC FIFO Status Register(Default Value: 0x0080_0088) ..................................................... 453
8.1.5.4. 0x10 ADC FIFO Control Register(Default Value: 0x0000_0F00) ................................................... 454
8.1.5.5. 0x14 ADC FIFO Status Register (Default Value: 0x0000_0000) .................................................... 456
8.1.5.6. 0x18 ADC RX DATA Register (Default Value: 0x0000_0000) ......................................................... 457
8.1.5.7. 0x20 DAC TX DATA Register (Default Value: 0x0000_0000) ......................................................... 457
8.1.5.8. 0x40 DAC TX Counter Register(Default Value: 0x0000_0000)...................................................... 457
8.1.5.9. 0x44 ADC RX Counter Register(Default Value: 0x0000_0000) ..................................................... 457
8.1.5.10. 0x48 DAC Debug Register (Default Value: 0x0000_0000) .......................................................... 458