Datasheet 14 Rev. 1.00
2017-07-11
TLD5501-2QV
Dual SYNC Buck Controller with SPI Interface
Power Supply
5.1 Different Power States
TLD5501-2QV has the following power states:
•SLEEP state
•IDLE state
•LIMP HOME state
•ACTIVE state
The transition between the power states is determined according to these variables after a filter time of max.
3 clock cycles:
•VIN level
•EN/INUVLO level
• IVCC level
• IVCC_EXT level
• VDD level
•LHI level
• DVCCTRL.IDLE bit state
The state diagram including the possible transitions is shown in Figure 6.
The Power-up condition is entered when the supply voltage V
VIN
exceed its minimum supply voltage threshold
V
VIN(ON)
.
SLEEP
When the device is powered it enters the SLEEP state, all outputs are OFF and the SPI registers are reset,
independently from the supply voltages at the pins VIN , VDD, IVCC, and IVCC_EXT. The current consumption
is low. Refer to parameters: I
VDD(SLEEP)
, and I
VIN(SLEEP)
.
The transition from SLEEP to ACTIVE state requires a specified time: t
ACTIVE
.
IDLE
In IDLE state, the current consumption of the device can reach the limits given by parameter I
VDD
(P_5.3.4). The
internal voltage regulator is working. Not all diagnosis functions are available (refer to Chapter 10 for
additional informations). In this state there is no switching activity, independently from the supply voltages
V
IN
, V
DD
, IVCC and IVCC_EXT. When V
DD
is available, the SPI registers are working and SPI communication is
possible.
Limp Home
The Limp Home state is beneficial to fulfill system safety requirements and provides the possibility to
maintain a defined current/voltage level on the output via a backup control circuitry. The backup control
circuitry turns on required loads during a malfunction of the µC. For detailed info, refer to Chapter 8.
When Limp Home state is entered, SPI registers are reset to their default values. In order to regulate the output
current/voltage, it is necessary that V
IN
and IVCC_EXT are present and above their undervoltage threshold. If
also VDD is above its undervoltage threshold, SPI communication is possible but only in read mode.
ACTIVE
In active state the device will start switching activity to provide power at the output only when PWMI1,2 = HIGH
or LOOPCTRL_CH1,2.PWM_1,2 = HIGH. To start the Highside gate drivers HSGD1,2 the voltage level V
BST1,2
- V
SWN1,2
needs to be above the threshold V
BST1,2
- V
SWN1,2_UVth
. In order to recharge the bootstrap capacitor,
sporadic switching activity could also be observed when PWMI1,2 = LOW and LOOPCTRL_CH1,2.PWM_1,2 =