#define WDT_MDLY_32 WDTPW+WDTTMSEL+WDTCNTCL /*
TSMCLK*2POWER15=32ms 复位状态 */
#define WDT_MDLY_8 WDTPW+WDTTMSEL+WDTCNTCL+WDTIS0 /*
TSMCLK*2POWER13=8.192ms " */
#define WDT_MDLY_0_5 WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1 /
* TSMCLK*2POWER9=0.512ms " */
#define WDT_MDLY_0_064
WDTPW+WDTTMSEL+WDTCNTCL+WDTIS1+WDTIS0 /*
TSMCLK*2POWER6=0.512ms " */
/* ACLK=32.768KHz 定时器模式*/
#define WDT_ADLY_1000 WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL
/* TACLK*2POWER15=1000ms " */
#define WDT_ADLY_250
WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS0 /*
TACLK*2POWER13=250ms " */
#define WDT_ADLY_16
WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1 /*
TACLK*2POWER9=16ms " */
#define WDT_ADLY_1_9
WDTPW+WDTTMSEL+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0 /*
TACLK*2POWER6=1.9ms " */
/* SMCLK=1MHz 看门狗模式 */
#define WDT_MRST_32 WDTPW+WDTCNTCL /*
TSMCLK*2POWER15=32ms 复位状态 */
#define WDT_MRST_8 WDTPW+WDTCNTCL+WDTIS0 /*
TSMCLK*2POWER13=8.192ms " */
#define WDT_MRST_0_5 WDTPW+WDTCNTCL+WDTIS1 /*
TSMCLK*2POWER9=0.512ms " */
#define WDT_MRST_0_064 WDTPW+WDTCNTCL+WDTIS1+WDTIS0 /*
TSMCLK*2POWER6=0.512ms " */
/* ACLK=32KHz 看门狗模式 */
#define WDT_ARST_1000 WDTPW+WDTCNTCL+WDTSSEL /*
TACLK*2POWER15=1000ms " */
#define WDT_ARST_250 WDTPW+WDTCNTCL+WDTSSEL+WDTIS0 /*
TACLK*2POWER13=250ms " */
#define WDT_ARST_16 WDTPW+WDTCNTCL+WDTSSEL+WDTIS1 /*
TACLK*2POWER9=16ms " */
#define WDT_ARST_1_9
WDTPW+WDTCNTCL+WDTSSEL+WDTIS1+WDTIS0 /*
TACLK*2POWER6=1.9ms " */
/************************************************************
硬件乘法器的寄存器定义
************************************************************/