UDA1341TS：单芯片立体声音频编码解码器

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"UDA1341TS是Philips Semiconductors推出的一款经济型音频编解码器，适用于MiniDisc (MD)家用音响和便携式应用。这款单芯片解决方案集成了模拟前端和数字音频信号处理功能，具有可编程增益放大器和数字自动增益控制器。" UDA1341TS芯片的主要特点包括： 1. **通用特性**：这款芯片设计用于经济型音频应用，适合MD系统和便携设备，提供高效能和低功耗的音频处理。 2. **多格式数据接口**：支持多种音频数据格式，适应不同的输入和输出需求，提供了灵活的接口选项。 3. **DAC数字声音处理**：内置的数模转换器（DAC）具备数字声音处理能力，可以进行高质量的音频还原。 4. **高级音频配置**：允许用户根据具体应用调整和优化音频参数，以实现最佳音质。在功能描述方面，UDA1341TS涵盖了以下关键组件和功能： 1. **系统时钟**：为芯片的各个部分提供精确的时间基准，确保音频信号的同步。 2. **引脚兼容性**：设计考虑了引脚的兼容性，方便在不同产品中使用。 3. **模拟前端**：包括PGA和ADC，负责将模拟音频信号转换成数字信号。 4. **可编程增益放大器(PGA)**：能够根据输入信号的强度动态调整增益，确保信号的稳定。 5. **模数转换器(ADC)**：将模拟信号转换为数字信号，同时包含过载检测、静音和降采样滤波等功能。 6. **数字自动增益控制(AGC)**：自动调整增益以保持恒定的输出电平，改善整体音频质量。 7. **AGC状态检测**：实时监测AGC的工作状态，确保增益控制的准确性。 8. **数字混音器**：允许混合和路由多个音频源，实现复杂音频处理。 9. **滤波流数字至模拟转换器(FSDAC)**：用于提升DAC的性能，确保高保真音频输出。 10. **多格式输入/输出接口**：支持多种音频格式，提供与各种音频系统的兼容性。 uda1341TS的这些特性使其成为MD播放器和便携式音频设备的理想选择，通过其集成的功能和高级音频配置，能实现高效、高质量的音频处理。无论是对于家庭音响还是便携设备，UDA1341TS都能提供出色的音频性能。

1998 Dec 18 6

Philips Semiconductors Preliminary speciﬁcation

Economy audio CODEC for MiniDisc (MD)

home stereo and portable applications

UDA1341TS

6 PINNING

SYMBOL PIN DESCRIPTION

SSA(ADC)

1 ADC analog ground

VINL1 2 ADC1 input left

DDA(ADC)

3 ADC analog supply voltage

VINR1 4 ADC1 input right

ADCN

5 ADC negative reference voltage

VINL2 6 ADC2 input left

ADCP

7 ADC positive reference voltage

VINR2 8 ADC2 input right

OVERFL 9 decimation ﬁlter overﬂow output

DDD

10 digital supply voltage

SSD

11 digital ground

SYSCLK 12 system clock 256f

, 384f

or 512f

L3MODE 13 L3-bus mode input

L3CLOCK 14 L3-bus clock input

L3DATA 15 L3-bus data input and output

BCK 16 bit clock input

WS 17 word select input

DATAO 18 data output

DATAI 19 data input

TEST1 20 test control 1 (pull-down)

TEST2 21 test control 2 (pull-down)

AGCSTAT 22 AGC status

QMUTE 23 quick mute input

VOUTR 24 DAC output right

DDA(DAC)

25 DAC analog supply voltage

VOUTL 26 DAC output left

SSA(DAC)

27 DAC analog ground

ref

28 ADC and DAC reference voltage

SYMBOL PIN DESCRIPTION

Fig.2 Pin configuration.

handbook, halfpage

SSA(ADC)

VINL1

DDA(ADC)

VINR1

ADCN

VINL2

ADCP

VINR2

OVERFL

DDD

SSD

SYSCLK

L3MODE

L3CLOCK

ref

SSA(DAC)

VOUTL

DDA(DAC)

QMUTE

AGCSTAT

VOUTR

TEST2

TEST1

DATAI

DATAO

BCK

L3DATA

1514

UDA1341TS

MGR428

Fig.3 Compatible pins with UDA1340M.

handbook, halfpage

SSA(ADC)

VINL1

DDA(ADC)

VINR1

ADCN

VINL2

ADCP

VINR2

OVERFL

DDD

SSD

SYSCLK

L3MODE

L3CLOCK

ref

SSA(DAC)

VOUTL

DDA(DAC)

QMUTE

AGCSTAT

VOUTR

TEST2

TEST1

DATAI

DATAO

BCK

L3DATA

Marked pins are compatible with UDA1340M

UDA1341TS

MGR429

1998 Dec 18 7

Philips Semiconductors Preliminary speciﬁcation

Economy audio CODEC for MiniDisc (MD)

home stereo and portable applications

UDA1341TS

7 FUNCTIONAL DESCRIPTION

7.1 System clock

The UDA1341TS accommodates slave mode only, this

means that in all applications the system devices must

provide the system clock. The system frequency is

selectable. The options are 256f

, 384f

or 512f

The system clock must be locked in frequency to the digital

interface signals.

7.2 Pin compatibility

The UDA1341TS is partially pin compatible with the

UDA1340M and UDA1344TS, making an upgrade of a

printed-circuit board from UDA1340M to UDA1341TS

easier. The pins that are compatible with the UDA1340M

are marked in Fig.3.

7.3 Analog front end

The analog front end of the UDA1341TS consists of two

stereo ADCs with a Programmable Gain Amplifier (PGA)

in channel 2. The PGA is intended to pre-amplify a

microphone signal applied to the input channel 2.

Input channel 1 has a selectable 0 or 6 dB gain stage, to

be controlled via the L3-interface. In this way, input signals

of 1 V (RMS value) or 2 V (RMS value) e.g. from a

CD source can be supported using an external resistor of

12 kΩ in series with the input channel 1. The application

modes are given in Table 1.

Table 1 Application modes using input gain stage

Note

1. If there is no need for 2 V (RMS value) input signal

support, the external resistor should not be used.

7.4 Programmable Gain Ampliﬁer (PGA)

The PGA can be set via the L3-interface at the gain

settings: −3, 0, 3, 9, 15, 21 or 27 dB.

RESISTOR

(12 kΩ)

INPUT

GAIN

SWITCH

MAXIMUM INPUT VOLTAGE

Present 0 dB 2 V (RMS value) input signal;

note 1

Present 6 dB 1 V (RMS value) input signal

Absent 0 dB 1 V (RMS value) input signal

Absent 6 dB 0.5 V (RMS value) input signal

7.5 Analog-to-Digital Converter (ADC)

The stereo ADC of the UDA1341TS consists of two

3rd-order Sigma-Delta modulators. They have a modified

Ritchie-coder architecture in a differential switched

capacitor implementation. The over-sampling ratio is 128.

7.6 Digital Automatic Gain Control (AGC)

Input channel 2 has a digital AGC to compress the

dynamic range when a microphone signal is applied to

input channel 2. The digital AGC can be switched on and

off via the L3-interface. In the on state the AGC

compresses the dynamic range of the input signal of input

channel 2. Via the L3-interface the user can set the

parameters of the AGC: attack time, decay time and output

level. When the AGC is set off via the L3-interface, the gain

of input channel 2 can be set manually. In this case the

gain of the PGA and digital AGC are combined. The range

of the gain of the input channel 2 is from −3 to +60.5 dB in

steps of 0.5 dB.

7.7 AGC status detection

The AGCSTAT signal from the digital AGC is HIGH when

the gain level of the AGC is below 8 dB. This signal can be

used to give the PGA a new gain setting via the

L3-interface and to power e.g. a LED.

7.8 Digital mixer

The two stereo ADCs (including the AGC) can be used in

four modes:

• ADC1 only mode (for line input); input channel 2 is off

• ADC2 only mode, including PGA and digital AGC (for

microphone input); input channel 1 is off

• ADC1 + ADC2 mixer mode, including PGA and AGC

• ADC1 and ADC2 double differential mode (improved

ADC performance).

Important: In order to prevent crosstalk between the line

inputs no signal should be applied to the microphone input

in the double differential mode.

In all modes (except the double differential mode) a

reference voltage is always present at the input of the

ADC. However, in the double differential mode there is no

reference voltage present at the microphone input.

In the mixer mode, the output signals of both ADCs in

channel 1 and channel 2 (after the digital AGC) can be

mixed with coefficients that can be set via the L3-interface.

The range of the mixer coefficients is from 0 to −∞ dB in

1.5 dB steps.

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