An Efficient Control Signal Generation Scheme for QKD System
Qiong Li, Hucheng Liu, Rui Zhu, Xiamu Niu
Information Countermeasure Technique Institute
Harbin Institute of Technology
Harbin, China
qiongli@hit.edu.cn
Abstract—In a QKD system, it is essential to generate many types
of control signals to guarantee the proper operations of all
physical devices. Although many practical QKD systems have
been developed, the control signal generation scheme has not
been studied thoroughly enough. In this paper, an efficient
control signal generation scheme based on FPGA is proposed.
Our scheme has the advantages of high precision, large adjusting
range and high reliability. Both the analysis and experimental
results verify the feasibility and high performance of the scheme.
Keywords-component; QKD; FPGA; Control Signal
Generation
I. INTRODUCTION
In these two decades, quantum key distribution (QKD) has
attracted many interests in both academic and industrial fields
because of its unique quantum mechanism based security [1].
As shown in Figure 1. a QKD system can be divided into four
layers: application layer, post-processing layer, interface layer
and physical layer. Although many practical QKD systems
have been developed, the interface layer has not been paid
many attentions so far [2]–[5]. Residing between the physical
layer and the post-processing layer, the interface layer controls
the proper operations of the devices of physical layer. The
operating rate of the devices in physical layer determines the
source data rate of the post-processing layer, and thereafter
affects the secret key rate of a QKD, which is the most
important performance of a QKD. Thus the performance of
interface layer has important impact on the secret key rate.
Except for controlling the operation of physical layer, another
function of interface layer is to synchronize and preprocess the
raw data from the physical layer for the post-processing layer.
As we know, the raw data from the physical layer cannot be
used by the post-processing directly because of the clock
domain problem. As a result, the performance of the interface
layer is very important to the whole QKD system.
There are three typical QKD physical layer schemes,
which are based on Mach–Zehnder interferometer [6],
Faraday–Michelson [7] and differential phase shift [8],
respectively. Different physical layer scheme has quite
different requirements for the interface layer. Based on
studying the physical system of Faraday–Michelson based
QKD, a FPGA based control signal generation scheme, which
is the core component of the interface layer of QKD, is
proposed in this paper. The control signal generation scheme
is consisted of five function units: Clock Frequency
Multiplication, Rough Step Delay Adjustment, Fine Step
Delay Adjustment, Signal Synthesis and Signal
Synchronization. Our scheme has the advantages of large
adjusting range, high precision, high quality and high
reliability. According to the experimental results, the signal
period of the scheme ranges from 10ns to 2.6ms; the precision
of the pulse width is 2.5ns; the delay covers from 0ns to 2.6ms
by combing the rough step delay (2.5ns) adjustment and fine
step delay (78ps) adjustment; the number of pulses in a signal
period can be adjusted from 0 and 10
7
. So the scheme can
generate control signals for the Faraday–Michelson based
QKD system and other similar QKD systems.
Figure 1. Typical structure of a QKD system.
II. INTRODUCTION TO PHYSICAL SYSTEM
The requirements for the control signal generation scheme
are determined by the principle and structure of physical
system of QKD. The physical system of two-way Faraday–
Michelson based QKD, for which our control signal scheme is
designed, is sketched in the Figure 2. A successful quantum
key distribution must follow the order of operations as
described below.
Step 1: A light pulse, denoted as
O
, is emitted by a laser
diode (LD) driven by the control signal, and enters a beam
splitter (BS
B
) through the circulator.
Step 2:
O
is separated into two pulses,
1
O
and
2
O
, by the
50/50 BS
B
.
1
O
enters the upper arm and
2
O
enters the lower
Application Application
Privacy Amplification
Error Correction
Sifting
Authentication
Optical
Module
Beam Path
Adjustment
High-Speed
Laser Driver
Random
Number
Generator
Control
Module
Privacy Amplification
Error Correction
Sifting
Authentication
Quantum Channel
Classical Channel
Alice
Bob
Application
Layer
Post-processing
Layer
Physical
Layer
Interface
Layer
Random
Number
Generator
Control
Module
Beam Path
Adjustment
High-Speed
Laser Driver
Optical
Module
Control
Signal
Generation
Data
Acquisition
Data
Preprocessing
D/A
Conversion
A/D
Conversion
Cache
Interface
Setting
PC
Interface
Control
Signal
Generation
Data
Acquisition
Data
Preproces sing
D/A
Conversion
A/D
Conversion
Cache
Interface
Setting
PC
Interface
Classical Channel
2015 Fifth International Conference on Instrumentation & Measurement, Computer, Communication
978-1-4673-7723-2/15 $31.00 © 2015 IEEE
DOI 10.1109/IMCCC.2015.221
1020