Optik
125 (2014) 540–
544
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Optik
j
o
ur
nal
hom
epage:
www.elsevier.de/ijleo
Analysis
and
simulation
for
current–voltage
models
of
thin-film
gated
SOI
lateral
PIN
photodetectors
Guoli
Li,
Yun
Zeng
∗
,
Wei
Hu,
Yu
Xia
College
of
Physics
and
Microelectronics
Science,
Hunan
University,
Changsha
410082,
China
a
r
t
i
c
l
e
i
n
f
o
Article
history:
Received
1
March
2013
Accepted
3
July
2013
Keywords:
LPIN
Photodetector
SOI
Depletion
voltage
Photocurrent
a
b
s
t
r
a
c
t
Based
on
the
semiconductor-device
structure
and
equations,
we
analyze
the
operation
principles
of
thin-film
gated
silicon-on
insulator
(SOI)
Lateral
PIN
(LPIN)
photodetectors,
and
obtain
current–voltage
models.
With
800
nm
film
thickness
and
8
m
channel
length,
we
validate
these
models
by
two-dimensional
(2D)
Atlas
numerical
measurements
and
electrical
simulations,
including
carriers
distri-
butions
and
current–voltage
characteristics.
In
fully-depleted
condition,
our
results
predict
the
internal
quantum
efficiency
as
high
as
97%
at
400
nm
wavelength,
a
very
low
dark
current
around
1
pA
and
a
high
ratio
of
more
than
10
7
between
illuminated
to
dark
current
with
low-voltage
operation.
Optimizing
the
performances
of
photodetectors,
our
models
have
highly
potential
applications
in
optical
storage
systems.
© 2013 Elsevier GmbH. All rights reserved.
1.
Introduction
High
responsivity
and
sensitivity
photodetectors
with
a
low
dark
current
are
required
increasingly
for
short
distance
optical
communications
and
emerging
optical
storage
systems
[1,2].
Conventional
bulk
silicon
detectors,
however,
cannot
match
with
these
specifications,
mainly
in
regards
to
responsivity
and
bandwidth
[3–5].
And
non-integrated
detectors
are
usually
used,
thanks
to
the
high
dark
current
of
photodiodes
and
low
sensitivity
of
MOS-structure
detectors
in
CMOS
processes
under
0.25
m
[6,7].
Lateral
PIN
photodiodes
fabricated
on
SOI
structure
in
CMOS
pro-
cesses
have
been
proposed
[8],
to
optimize
the
performances
of
the
photodetectors.
Thin-film
SOI
lateral
photodiodes
have
achieved
bandwidth
compatible
with
10
Gb/s
and
even
higher
high
data
rate
among
the
“easy
to
integrate”
photodetectors
[9],
as
the
candidates
of
high
interest
for
short
distance
optical
communications.
In
the
blue
and
UV
wavelengths,
these
diodes
further
achieve
high
speed,
sensitivity
and
low
dark
current,
highly
suitable
for
blue
DVD
and
future
optical
storage
applications
[10].
However,
within
device
parameters
of
actual
SOI
CMOS
pro-
cesses,
the
intrinsic
region,
corresponding
in
fact
to
a
P-doping
of
about
10
15
cm
−3
,
is
not
necessary
fully
depleted
and
other
phenomena
have
to
be
taken
into
account
like
volume
and
sur-
face
recombinations
[8].
High
reverse
voltage
must
be
applied
to
make
the
channel
fully
depleted,
to
achieve
high
photocurrent,
low
dark
current,
and
high
quantum
efficiency,
responsivity.
It
is
not
∗
Corresponding
author.
Tel.:
+86
731
88822332;
fax:
+86
731
88822332.
E-mail
address:
yunzeng@hnu.edu.cn
(Y.
Zeng).
propitious
to
low-voltage
operation
or
microelectronic
integration
for
the
small
input
resistance.
Aiming
at
this
issue,
a
novel
thin-film
gated
SOI
LPIN
photode-
tector
has
been
proposed
recently
based
on
SOI
technology
and
CMOS
process
[11,12].
Combining
all
the
advantages
of
PN
and
MOS
structure
photodetectors
[13,14],
the
detectors
can
obtain
the
maximum
photocurrent
and
low
dark
current,
and
achieve
high
sensitivity
and
responsivity
with
low-voltage
operation.
Here,
we
present
the
device
structure,
analyze
the
operating
principles
and
obtain
voltage
and
current
physical
equations.
We
validate
this
model
by
full
2D
Atlas
numerical
measurements
and
electrical
sim-
ulations,
predict
and
optimize
the
performances
of
photodetectors
for
concrete
applications.
2.
Structure
and
principle
The
basic
structure
of
a
thin-film
gated
SOI
LPIN
photodetector
is
shown
in
Fig.
1.
The
silicon
substrate
layer,
the
buried
oxide
layer
and
the
silicon
layer
form
the
particular
SOI
structure.
The
pho-
todetector
built
on
SOI
consists
of
a
P-type
silicon
film
into
which
a
P
+
-region
and
a
N
+
-region
are
usually
formed
by
ion
implantation.
And
ITO
deposited
on
the
top
oxide
layer
is
used
as
transparent
gate
electrode.
For
thin-film
SOI
devices,
the
silicon-film
thickness
should
be
smaller
than
the
maximum
depletion
width
x
max
:
x
max
=
4ε
Si
ϕ
F
qN
A
(1)
where
ϕ
F
is
the
Fermi
potential,
N
A
is
the
acceptors
density
in
the
channel.
And
it
also
need
be
sufficiently
thick
to
allow
a
large
0030-4026/$
–
see
front
matter ©
2013 Elsevier GmbH. All rights reserved.
http://dx.doi.org/10.1016/j.ijleo.2013.07.030