for loop is showed below in figure
21.Next to port definitions comes port directions. Directions are specified as input, output or i
nout (bidirectional), and can be referred to in table 1. Next to the specification of port directio
ns comes declaration of internal signals. Internal signals in Verilog are declared as “wire”
or “reg” data types. Signals of the “wire”
type are used for continuos assignments, also called combinatorial statements. Signals of the
“reg” type are used for assignments within the Verilog “always”
block, often use for sequential logic assignments, but not necessarily. For further explanation
see aVerilog reference book. Data types of the internal signals of the module can be referred t
o in table 3.We have now passed by all necessary declarations, and are now ready to look at th
e actual implementation. Using hardware description language allows us to describe the funct
ion of the transmitter in a more behavioral manner, rather than focus on it’
s actual implementation at gate level In software programming language, functions and proce
dures breaks larger programs into more readable, manageable and certainly maintainable piec
es. The Verilog language provides functions and tasks as constructs, analogous to software fu
nctions and procedures. A Verilog function and task are used as the equivalent to multiple lin
es of Verilog code, where certain inputs or signals affects certain outputs or variables. The use
of functions and tasks usually takes place where multiple lines of code are repeatedly used in
a design, and hence makes the design easier to read and certainly maintain. A Verilog functio
n can have multiple inputs, but always have only one output, while the Verilog task can have
both multiple inputs, and multiple outputs and even in some cases, non of each. Below is sho
wn the Verilog task, that hold all necessary sequential statements, to describe the transmitter i
n the “shift” mode
With the LabVIEW FPGA Module and NI RIO hardware, you now can use LabVIEW, a
high-level graphical development environment designed specifically for measurement and
control applications, to create PACs that have the customization, flexibility, and
high-performance of FPGAs. Because the LabVIEW FPGA Module configures custom
circuitry in hardware, your system can process and generate synchronized analog and digital
signals rapidly and deterministically. Figure 1 illustrates many of the NI RIO devices that you
can configure using the LabVIEW FPGA Module.
Figure 1. LabVIEW FPGA VI Block Diagram and RIO Hardware Platforms
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