GD32F307中断表
时间: 2023-09-05 15:07:50 浏览: 51
GD32F307的中断表可以在GD32F30x Standard Peripherals Library中找到。在库文件的文件夹中,可以找到一个名为"GD32F30x_StdPeriph_Examples\GD32F30x-EVAL\IAR-Keil\Project\GD32F30x_EVAL\Interrupt"的示例文件夹,其中包含了一个中断表的头文件"gd32f30x_it.h",其中包含了所有中断的宏定义和中断处理函数的原型。
以下是该头文件中的中断表:
```c
typedef enum
{
/* GD32F30x devices commonly used interrupts */
WWDGT_IRQn = 0, /*!< window watchdog interrupt */
LVD_IRQn = 1, /*!< LVD through EXTI line detect interrupt */
TAMPER_IRQn = 2, /*!< tamper through EXTI line detection interrupt */
RTC_IRQn = 3, /*!< RTC global interrupt */
FMC_IRQn = 4, /*!< FMC interrupt */
RCU_CTC_IRQn = 5, /*!< RCU and CTC interrupt */
EXTI0_IRQn = 6, /*!< EXTI line 0 interrupt */
EXTI1_IRQn = 7, /*!< EXTI line 1 interrupt */
EXTI2_IRQn = 8, /*!< EXTI line 2 interrupt */
EXTI3_IRQn = 9, /*!< EXTI line 3 interrupt */
EXTI4_IRQn = 10, /*!< EXTI line 4 interrupt */
DMA0_Channel0_IRQn = 11, /*!< DMA0 channel0 interrupt */
DMA0_Channel1_IRQn = 12, /*!< DMA0 channel1 interrupt */
DMA0_Channel2_IRQn = 13, /*!< DMA0 channel2 interrupt */
DMA0_Channel3_IRQn = 14, /*!< DMA0 channel3 interrupt */
DMA0_Channel4_IRQn = 15, /*!< DMA0 channel4 interrupt */
DMA0_Channel5_IRQn = 16, /*!< DMA0 channel5 interrupt */
DMA0_Channel6_IRQn = 17, /*!< DMA0 channel6 interrupt */
ADC1_2_IRQn = 18, /*!< ADC1 and ADC2 global interrupt */
CAN0_TX_IRQn = 19, /*!< CAN0 TX interrupts */
CAN0_RX0_IRQn = 20, /*!< CAN0 RX0 interrupts */
CAN0_RX1_IRQn = 21, /*!< CAN0 RX1 interrupt */
CAN0_EWMC_IRQn = 22, /*!< CAN0 EWMC interrupts */
EXTI5_9_IRQn = 23, /*!< EXTI[9:5] interrupts */
TIMER0_BRK_IRQn = 24, /*!< TIMER0 break interrupts */
TIMER0_UP_IRQn = 25, /*!< TIMER0 update interrupts */
TIMER0_TRG_CMT_IRQn = 26, /*!< TIMER0 trigger and commutation interrupts */
TIMER0_Channel_IRQn = 27, /*!< TIMER0 channel capture compare interrupts */
TIMER1_IRQn = 28, /*!< TIMER1 global interrupt */
TIMER2_IRQn = 29, /*!< TIMER2 global interrupt */
TIMER3_IRQn = 30, /*!< TIMER3 global interrupt */
I2C0_EV_IRQn = 31, /*!< I2C0 event interrupt */
I2C0_ER_IRQn = 32, /*!< I2C0 error interrupt */
I2C1_EV_IRQn = 33, /*!< I2C1 event interrupt */
I2C1_ER_IRQn = 34, /*!< I2C1 error interrupt */
SPI0_IRQn = 35, /*!< SPI0 global interrupt */
SPI1_IRQn = 36, /*!< SPI1 global interrupt */
USART0_IRQn = 37, /*!< USART0 global interrupt */
USART1_IRQn = 38, /*!< USART1 global interrupt */
USART2_IRQn = 39, /*!< USART2 global interrupt */
EXTI10_15_IRQn = 40, /*!< EXTI[15:10] interrupts */
RTC_ALARM_IRQn = 41, /*!< RTC alarm interrupt */
USBFS_WKUP_IRQn = 42, /*!< USBFS wakeup interrupt */
TIMER7_BRK_IRQn = 43, /*!< TIMER7 break interrupts */
TIMER7_UP_IRQn = 44, /*!< TIMER7 update interrupts */
TIMER7_TRG_CMT_IRQn = 45, /*!< TIMER7 trigger and commutation interrupts */
TIMER7_Channel_IRQn = 46, /*!< TIMER7 channel capture compare interrupts */
ADC2_COMP_IRQn = 47, /*!< ADC2 and comparator interrupts */
USBFS_IRQn = 48, /*!< USBFS global interrupt */
ENET_IRQn = 49, /*!< Ethernet global interrupt */
ENET_WKUP_IRQn = 50, /*!< Ethernet wakeup interrupt */
CAN1_TX_IRQn = 51, /*!< CAN1 TX interrupts */
CAN1_RX0_IRQn = 52, /*!< CAN1 RX0 interrupts */
CAN1_RX1_IRQn = 53, /*!< CAN1 RX1 interrupt */
CAN1_EWMC_IRQn = 54, /*!< CAN1 EWMC interrupts */
USBHS_WKUP_IRQn = 55, /*!< USBHS wakeup interrupt */
USBHS_IRQn = 56, /*!< USBHS global interrupt */
}IRQn_Type;
```