用VHDL语言做一个计算器，并写出代码 内容及要求实现一位十进制数的加减乘除运算，结果显示在数码管上。（1）键盘作为运算数据输入； （2）不同位置的按键代表运算符； （3）2个数码管显示运算结果； （4）支持连续运算；

以下是一个简单的使用 VHDL 实现一位十进制数的加减乘除运算的计算器代码，结果显示在数码管上：

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;

entity calculator is
    Port ( clk : in STD_LOGIC;
           reset : in STD_LOGIC;
           key_in : in STD_LOGIC_VECTOR(3 downto 0);
           seven_seg_out_1 : out STD_LOGIC_VECTOR(6 downto 0);
           seven_seg_out_2 : out STD_LOGIC_VECTOR(6 downto 0));
end calculator;

architecture Behavioral of calculator is

    type state_type is (init, num1, num2, result);
    signal state : state_type;
    signal op : std_logic_vector(1 downto 0);
    signal num1 : unsigned(3 downto 0);
    signal num2 : unsigned(3 downto 0);
    signal result : unsigned(3 downto 0);

begin

    process(clk, reset)
    begin
        if reset = '1' then
            state <= init;
            num1 <= (others => '0');
            num2 <= (others => '0');
            result <= (others => '0');
            op <= "00";
        elsif rising_edge(clk) then
            case state is
                when init =>
                    if key_in /= "1111" then
                        num1 <= unsigned(key_in);
                        state <= num1;
                    end if;
                when num1 =>
                    if key_in /= "1111" then
                        if key_in = "1100" then
                            op <= "00"; -- add
                            state <= num2;
                        elsif key_in = "1101" then
                            op <= "01"; -- subtract
                            state <= num2;
                        elsif key_in = "1110" then
                            op <= "10"; -- multiply
                            state <= num2;
                        elsif key_in = "1111" then
                            op <= "11"; -- divide
                            state <= num2;
                        else
                            num1 <= num1 * 10 + unsigned(key_in);
                        end if;
                    end if;
                when num2 =>
                    if key_in /= "1111" then
                        if key_in = "1100" then -- add
                            result <= num1 + num2;
                            state <= result;
                        elsif key_in = "1101" then -- subtract
                            result <= num1 - num2;
                            state <= result;
                        elsif key_in = "1110" then -- multiply
                            result <= num1 * num2;
                            state <= result;
                        elsif key_in = "1111" then -- divide
                            result <= num1 / num2;
                            state <= result;
                        else
                            num2 <= num2 * 10 + unsigned(key_in);
                        end if;
                    end if;
                when result =>
                    if key_in /= "1111" then
                        num1 <= result;
                        num2 <= (others => '0');
                        op <= "00";
                        state <= num1;
                    end if;
            end case;
        end if;
    end process;

    process(result)
    begin
        case result is
            when 0 => seven_seg_out_1 <= "0000001"; seven_seg_out_2 <= "0000000";
            when 1 => seven_seg_out_1 <= "1001111"; seven_seg_out_2 <= "0000000";
            when 2 => seven_seg_out_1 <= "0010010"; seven_seg_out_2 <= "0000000";
            when 3 => seven_seg_out_1 <= "0000110"; seven_seg_out_2 <= "0000000";
            when 4 => seven_seg_out_1 <= "1001100"; seven_seg_out_2 <= "0000000";
            when 5 => seven_seg_out_1 <= "0100100"; seven_seg_out_2 <= "0000000";
            when 6 => seven_seg_out_1 <= "0100000"; seven_seg_out_2 <= "0000000";
            when 7 => seven_seg_out_1 <= "0001111"; seven_seg_out_2 <= "0000000";
            when 8 => seven_seg_out_1 <= "0000000"; seven_seg_out_2 <= "0000001";
            when 9 => seven_seg_out_1 <= "0000100"; seven_seg_out_2 <= "0000001";
            when 10 => seven_seg_out_1 <= "0001000"; seven_seg_out_2 <= "0000001";
            when 11 => seven_seg_out_1 <= "1100000"; seven_seg_out_2 <= "0000000";
            when others => seven_seg_out_1 <= "1111111"; seven_seg_out_2 <= "1111111";
        end case;
    end process;

end Behavioral;

该代码使用了有限状态机来处理不同的状态，并根据输入的按键执行相应的操作。数码管输出使用了简单的 case 语句，将结果转换为七段数码管的控制信号。注意，此代码仅用于演示目的，可能需要根据您的具体要求进行修改。