![](https://csdnimg.cn/release/download_crawler_static/6718795/bg14.jpg)
S3C2410X MICROPROCESSOR xix
List of Figures
Figure Title Page
Number Number
1-1 S3C2410X Block Diagram......................................................................................1-5
1-2 S3C2410X Pin Assignments (272-FBGA) ...............................................................1-6
2-1 Big-Endian Addresses of Bytes within Words..........................................................2-2
2-2 Little-Endian Addresses of Bytes within Words .......................................................2-2
2-3 Register Organization in ARM State .......................................................................2-4
2-4 Register Organization in THUMB state ...................................................................2-5
2-5 Mapping of THUMB State Registers onto ARM State Registers..............................2-6
2-6 Program Status Register Format ............................................................................2-7
3-1 ARM Instruction Set Format ...................................................................................3-1
3-2 Branch and Exchange Instructions..........................................................................3-5
3-3 Branch Instructions.................................................................................................3-7
3-4 Data Processing Instructions ..................................................................................3-9
3-5 ARM Shift Operations.............................................................................................3-12
3-6 Logical Shift Left ....................................................................................................3-12
3-7 Logical Shift Right ..................................................................................................3-13
3-8 Arithmetic Shift Right .............................................................................................3-13
3-9 Rotate Right ...........................................................................................................3-14
3-10 Rotate Right Extended ...........................................................................................3-14
3-11 PSR Transfer .........................................................................................................3-19
3-12 Multiply Instructions................................................................................................3-22
3-13 Multiply Long Instructions .......................................................................................3-25
3-14 Single Data Transfer Instructions............................................................................3-28
3-15 Little-Endian Offset Addressing ..............................................................................3-30
3-16 Halfword and Signed Data Transfer with Register Offset ........................................3-34
3-17 Halfword and Signed Data Transfer with Immediate Offset and Auto-Indexing .......3-35
3-18 Block Data Transfer Instructions.............................................................................3-40
3-19 Post-Increment Addressing.....................................................................................3-41
3-20 Pre-Increment Addressing ......................................................................................3-42
3-21 Post-Decrement Addressing ...................................................................................3-42
3-22 Pre-Decrement Addressing.....................................................................................3-43
3-23 Swap Instruction.....................................................................................................3-47
3-24 Software Interrupt Instruction..................................................................................3-49
3-25 Coprocessor Data Operation Instruction .................................................................3-51
3-26 Coprocessor Data Transfer Instructions..................................................................3-53
3-27 Coprocessor Register Transfer Instructions ............................................................3-56
3-28 Undefined Instruction..............................................................................................3-58