LCD Application Note 1
LCD Application Note
LCD Interfacing
INTRODUCTION
Modern industrial products on the market today are
increasingly using LCD panels to provide a more
sophisticated visual interface with the user. These pan-
els have evolved into units that are easy to work with,
bright, have high contrast, and come in a wide variety
of sizes. The most popular LCD panels are the Amor-
phous Silicon Thin Film Transistor or a-SiTFT panels.
This article discusses how to drive a TFT panel using
typical processors found in embedded applications.
State of the art TFT panels typically have the input
signals shown in Figure 1 and described in Table 1.
Note that some small, lower end panels may not
have all of the electronics included with them because
of size or cost restraints. Some panels have a simple
row and column interface. Some may need an external
timing controller. Some have a processor bus type
interface. Panels such as these are beyond the scope
of this article. Depending on internal circuitry demands,
some panels may include a few other signals, such as
a reset line. Determining how to drive such simple sig-
nals is usually straightforward.
Many LCD controllers, including those integrated
into microcontrollers, will directly drive the signals
shown in Figure 1. This means that the biggest obsta-
cle to quickly getting an image on the screen is gener-
ating the appropriate signal timing. The LCD controller
is, of course, responsible for generating the timing;
however software must be written to correctly program
the controller for the target LCD panel. The interface
between a Sharp™ LQ050Q5DR01 and a Freescale™
MC9328MXL will be used as an example.
MECHANICS OF AN LCD PANEL
An LCD panel comprises a matrix of pixels (picture
elements), divided into red, green, and blue “sub-pix-
els”. Each sub-pixel is driven by a small transistor. Typ-
ically, LCD panels have internal row and column
drivers, much like DRAM. A row is selected by the row
driver, then the column driver sequences through each
of the columns. After each of the columns has been writ-
ten, the row driver selects the next row and the process
repeats. The VSYNC signal resets both row and column
drivers to the upper left pixel. The HSYNC causes the
row driver to step to the new row. The clock sequences
the column driver through each of the pixels, with each
clock edge latching data values for the red, green, and
blue sub-pixels. These values drive a form of D/A con-
verter to store an electrical charge in a capacitor in each
sub-pixel which controls the drive of the transistor; this
in turn controls the brightness of the sub-pixel. A red-
green-blue color mask is used to filter the light from
each sub-pixel to form its corresponding color.
Figure 1. Typical LCD Input Signals
Table 1. Input Signals
SIGNAL FUNCTION
CLOCK Latches the pixel data.
VSYNC
Resets the internal circuitry so that
the next active pixel will be in the
upper left corner
HSYNC
Sets the next active pixel to be first
pixel on the next line down
ENAB Indicates valid pixel data (optional)
DATA (usually
18 to 24 lines)
Actual pixel data equally split be-
tween red, green, and blue.
LCD35-1
CLOCK
VSYNC
HSYNC
ENAB
DATA
Interfacing LCD Panels to Microcontrollers
Ken Green, Sharp Microelectronics of the Americas
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