CONFIDENTIAL
INCA-IP2s/INCA-IP2c
PSB 21653/PSB 21621
Conception of the Phone
Preliminary Hardware Design Guide 8 Revision 1.1, 2007-05-08
1 Conception of the Phone
The INCA-IP2 can be used for low-cost phones as well as for high end phones. To achieve this a very flexible
architecture is used. The balls of the INCA-IP2 are multiplexed in many cases and many interfaces are available.
This chapter intends to provide you an overview of possibilities. The details are discussed in Chapter 2.
1.1 Choice of Components
1.1.1 Crystal versus Oscillator
You can use the INCA-IP2 with an Oscillator, but there is no reason to avoid the use of the cheaper Crystal. If
there are several devices on the board which can use the same clock source, the INCA-IP2 can run in oscillator-
mode.
It is also possible to use one of the two clock outputs of the INCA-IP2 to provide the signal to the periphery. In this
case the jitter and the signal-quality must be double-checked in detail. If the clock signal runs through an internal
PLL of the INCA-IP2 an additional jitter is introduced.
1.1.2 DDR-SRAM versus SDR-SDRAM
The main reason to provide two kind of RAMs is the unpredictability of pricing. The INCA-IP2 preforms excellently
with both kind of volatile storages, whereas the use of DDR-SDRAM still increases the speed of the system.
The delivered Phone Application software, which is good for an enhanced graphical wide-band-phone needs less
than 16 MByte SDRAM. The Linux OS is runs on SDRAM completely.
Low-cost-phones can also work with less memory, but additional software-effort may be needed.
To calculate the real costs, the additional 2.5 V power-supply for the DDR-SDRAM must be taken into account.
This power-supply can be used for other devices too. The 2.5 V supply can be very low cost.
There is little software effort needed to switch from SDR-SDRAM to DDR-SDRAM or vice versa. To make a combo
design with both RAM-types is not recommended.
1.1.3 Choice of Flash
Serial and parallel NOR-based flash can be used as well as NAND-based flash. The NOR-based flash is more
expensive and slower than NAND-based flash. The NOR-based devices can work with an 8 or 16 bit wide bus.
NAND-based flash is only available in bigger modules so that it is not cheap enough for low-cost phones. In former
times the data integrity of NAND-based flash was a problem, and it should be double-checked today, too. The long
time availability should be clarified with the supplier.
Note: The use of serial flash instead of a parallel flash makes it easier to develop a four-layer design.
1.1.4 Power-Supply Selection
The INCA-IP2 needs a 1.5 V and a 3.3 V power supply. If a DDR-RAM is used, there is also a 2.5 V needed.
The expected maximum consumption of the INCA-IP2 is less than 600 mA for 1.5 V. The theoretical transient
consumption can be higher and so a reserve of 300 mA should be provided for the INCA-IP2
1)
.
Using two 64 MByte devices the highest maximum consumption in a realistic scenario is less than 150mA for the
2.5 V power supply. This includes the two DDR-RAM modules and the INCA-IP2. The theoretical transient
consumption can be up to 300 mA.
1) The absolute peak consumption is measured with programs which are far away from a reasonable application, but only to
stress the chip.