![](https://csdnimg.cn/release/download_crawler_static/86762742/bg11.jpg)
7.5.3.10 Slot Control Register (Oset 18h) ................................................................................................................... 987
7.5.3.11 Slot Status Register (Oset 1Ah)..................................................................................................................... 990
7.5.3.12 Root Control Register (Oset 1Ch) ................................................................................................................. 992
7.5.3.13 Root Capabilities Register (Oset 1Eh) .......................................................................................................... 994
7.5.3.14 Root Status Register (Oset 20h).................................................................................................................... 994
7.5.3.15 Device Capabilities 2 Register (Oset 24h)..................................................................................................... 996
7.5.3.16 Device Control 2 Register (Oset 28h).......................................................................................................... 1001
7.5.3.17 Device Status 2 Register (Oset 2Ah)............................................................................................................ 1004
7.5.3.18 Link Capabilities 2 Register (Oset 2Ch) ...................................................................................................... 1005
7.5.3.19 Link Control 2 Register (Oset 30h).............................................................................................................. 1008
7.5.3.20 Link Status 2 Register (Oset 32h)................................................................................................................ 1011
7.5.3.21 Slot Capabilities 2 Register (Oset 34h) ....................................................................................................... 1014
7.5.3.22 Slot Control 2 Register (Oset 38h) .............................................................................................................. 1015
7.5.3.23 Slot Status 2 Register (Oset 3Ah) ................................................................................................................ 1015
7.6 PCI Express Extended Capabilities ............................................................................................................................... 1015
7.6.1 Extended Capabilities in Configuration Space..................................................................................................... 1015
7.6.2 Extended Capabilities in the Root Complex Register Block ................................................................................ 1015
7.6.3 PCI Express Extended Capability Header ............................................................................................................. 1016
7.7 PCI and PCIe Capabilities Required by the Base Spec in Some Situations ................................................................ 1016
7.7.1 MSI Capability Structures...................................................................................................................................... 1016
7.7.1.1 MSI Capability Header (Oset 00h) .............................................................................................................. 1018
7.7.1.2 Message Control Register for MSI (Oset 02h)............................................................................................. 1019
7.7.1.3 Message Address Register for MSI (Oset 04h) ............................................................................................ 1021
7.7.1.4 Message Upper Address Register for MSI (Oset 08h)................................................................................. 1021
7.7.1.5 Message Data Register for MSI (Oset 08h or 0Ch) ...................................................................................... 1022
7.7.1.6 Extended Message Data Register for MSI (Optional).................................................................................... 1022
7.7.1.7 Mask Bits Register for MSI (Oset 0Ch or 10h .............................................................................................. 1023
7.7.1.8 Pending Bits Register for MSI (Oset 10h or 14h) ........................................................................................ 1023
7.7.2 MSI-X Capability and Table Structure................................................................................................................... 1024
7.7.2.1 MSI-X Capability Header (Oset 00h) ........................................................................................................... 1027
7.7.2.2 Message Control Register for MSI-X (Oset 02h).......................................................................................... 1028
7.7.2.3 Table Oset/Table BIR Register for MSI-X (Oset 04h) ................................................................................ 1029
7.7.2.4 PBA Oset/PBA BIR Register for MSI-X (Oset 08h) ..................................................................................... 1029
7.7.2.5 Message Address Register for MSI-X Table Entries....................................................................................... 1030
7.7.2.6 Message Upper Address Register for MSI-X Table Entries............................................................................ 1031
7.7.2.7 Message Data Register for MSI-X Table Entries ............................................................................................ 1031
7.7.2.8 Vector Control Register for MSI-X Table Entries ........................................................................................... 1031
7.7.2.9 Pending Bits Register for MSI-X PBA Entries ................................................................................................ 1032
7.7.3 Secondary PCI Express Extended Capability........................................................................................................ 1033
7.7.3.1 Secondary PCI Express Extended Capability Header (Oset 00h) .............................................................. 1035
7.7.3.2 Link Control 3 Register (Oset 04h).............................................................................................................. 1035
7.7.3.3 Lane Error Status Register (Oset 08h) ........................................................................................................ 1036
7.7.3.4 Lane Equalization Control Register (Oset 0Ch).......................................................................................... 1037
7.7.4 Data Link Feature Extended Capability ................................................................................................................ 1039
7.7.4.1 Data Link Feature Extended Capability Header (Oset 00h)....................................................................... 1040
7.7.4.2 Data Link Feature Capabilities Register (Oset 04h) ................................................................................... 1041
7.7.4.3 Data Link Feature Status Register (Oset 08h)............................................................................................. 1042
7.7.5 Physical Layer 16.0 GT/s Extended Capability...................................................................................................... 1043
7.7.5.1 Physical Layer 16.0 GT/s Extended Capability Header (Oset 00h) ............................................................ 1045
7.7.5.2 16.0 GT/s Capabilities Register (Oset 04h) .............................................................................................. 1045
6.0.1-1.0-PUB — PCI Express® Base Specification Revision 6.0.1
Page 17
Base 6.0.1 (Base 6.0 plus Errata as of 2022-08-29)