美信MAX17853电池管理芯片手册：高低压电池模块灵活采集系统，支持14个电池电压测量和6个温度或系统电压测量，支持高达448个电池的多设备管理。

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LIST OF FIGURES

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Figure 72. Low-Voltage Regulator and Thermal-Shutdown Circuit .......................................147

Figure 73. HV Charge Pump ................................................................... 149

Figure 74. Die-Temperature Measurement ........................................................ 152

Figure 75. V

Diagnostic ..................................................................... 153

Figure 76. ALTREF Diagnostic.................................................................. 154

Figure 77. Comparator Signal Path to ADC ........................................................ 155

Figure 78. Comparator Accuracy Diagnostic Path................................................... 157

Figure 79. Comparator Accuracy End of Scan Measurement .......................................... 158

Figure 80. Cell Gain Calibration-Diagnostic Measurement ............................................ 159

Figure 81. Offset-Calibration Diagnostic .......................................................... 160

Figure 82. THRM Offset-Calibration Diagnostic .................................................... 160

Figure 83. LSAMP Offset Diagnostic............................................................. 161

Figure 84. ADC Zero-Scale Diagnostic ........................................................... 162

Figure 85. Full-Scale ADC Diagnostic Measurement ................................................ 162

Figure 86. DAC 1/4 and 3/4 Diagnostic ........................................................... 163

Figure 87. Balancing Switch Short ............................................................... 165

Figure 88. BALSW Short-Diagnostic Chart ........................................................ 166

Figure 89. BALSW Open Diagnostic ............................................................. 168

Figure 90. Sense-Wire Open-Diagnostic Flow ..................................................... 168

Figure 91. Cell Sense-Wire Open-Diagnostic Operations (Normal Operation)............................. 169

Figure 92. Cell Sense-Wire Open-Diagnostic Operations (Normal Operation, Including Bus Bars) .............170

Figure 93. Cell Sense-Wire Open-Diagnostic Operations (Example with Odd Sense-Wire Fault)...............171

Figure 94. Cell Sense-Wire Open-Diagnostic Operations (Example with Even Sense-Wire Fault) ..............171

Figure 95. Cell Sense-Wire Open-Diagnostic Operations (Example with Broken BALSW or Internal Trace) ......174

Figure 96. Electric Vehicle System .............................................................. 292

Figure 97. Daisy-Chain System ................................................................. 293

Figure 98. Distributed System .................................................................. 294

Figure 99. Power-Supply Connection ............................................................ 295

Figure 100. External-Balancing FET ............................................................. 296

Figure 101. External Cell-Balancing BJT.......................................................... 297

Figure 102. UART Connection .................................................................. 298

Figure 103. High-Z Idle Mode Application Circuit ................................................... 299

Figure 104. External ESD Protection for UART Tx Ports ............................................. 299

Figure 105. External ESD Protection for UART Rx Ports ............................................. 300

Figure 106. Application Circuit for Single-Ended UART Mode ......................................... 300

Figure 107. UART Transformer Isolation .......................................................... 301

Figure 108. UART Optical Isolation .............................................................. 302

Figure 109. 5V SPI Supply from System .......................................................... 303

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Maxim Integrated │ 16

MAX17853 14-Channel High-Voltage Data-Acquisition System

LIST OF FIGURES

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Figure 110. 3.3V SPI Supply from Device V

LDO ................................................. 304

Figure 111. Single-End ALERT Interface in UART Mode ............................................. 305

Figure 112. Single-End ALERT Interface in SPI mode - Active Drive .................................... 306

Figure 113. Single-End ALERT Interface in SPI mode - Passive Drive .................................. 307

Figure 114. Device Initialization Sequence ........................................................ 308

Figure 115. PEC CRC Calculation ............................................................... 310

Figure 116. ROMCRC Calculation ................................................................313

LIST OF TABLES

Table 1. System Blocks ........................................................................ 39

Table 2. Data-Acquisition Process................................................................ 43

Table 3. Numeric Conventions ................................................................... 43

Table 4. THRM Output ......................................................................... 51

Table 5. AUXTIME . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Table 6. Auxiliary-Temperature Input Range: ADC ................................................... 52

Table 7. Auxiliary-Temperature Input Range: Comparator.............................................. 52

Table 8. Auxiliary-Voltage Input Range: ADC ....................................................... 53

Table 9. Auxiliary-Voltage Input Range: Comparator.................................................. 53

Table 10. GPIO/Auxiliary Enable Selection ......................................................... 54

Table 11. GPIO Configuration ................................................................... 54

Table 12. Shutdown Timing ..................................................................... 57

Table 13. ADC Input Range ..................................................................... 65

Table 14. Comparator Input Range ............................................................... 66

Table 15. ADC Pyramid Mode (SCANMODE = 0) Acquisition Time ...................................... 70

Table 16. ADC Ramp Mode (SCANMODE = 1) Acquisition Time ........................................ 73

Table 17. ADC Acquisition Time Examples (with AUXTIME[9:0] = 000h) ...................................74

Table 18. Comparator Acquisition Time............................................................ 75

Table 19. Comparator Acquisition-Time Examples (with AUXTIME[9:0] = 000h) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Table 20. ADC+COMP Acquisition Time ........................................................... 77

Table 21. ADC+COMP Acquisition Time Examples (with AUXTIME[9:0] = 000h) ........................... 78

Table 22. Measurement Path Calibration Alerts ..................................................... 80

Table 23. Comparator Faults for Alerts vs. Oversampling.............................................. 82

Table 24. Watchdog-Timeout Duration............................................................. 82

Table 25. FOSR Notch-Filter Setting .............................................................. 83

Table 26. IIR 100mV Step Response Settling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

Table 27. IIR Data-Control Settings ............................................................... 88

Table 28. Measurement Alerts ................................................................... 91

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Maxim Integrated │ 17

MAX17853 14-Channel High-Voltage Data-Acquisition System

LIST OF TABLES

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CONTINUED

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Table 29. Set- and Clear-Threshold Selection ....................................................... 92

Table 30. Temperature-Alert Threshold ............................................................ 94

Table 31. Cell-Balancing Register Write Behavior when Cell Balancing is Selected ......................... 96

Table 32. Cell-Balancing Mode ................................................................. 100

Table 33. Emergency-Discharge Mode ........................................................... 103

Table 34. Cell-Balancing Measurement Enable..................................................... 105

Table 35. Cell-Balancing Calibration Selection ..................................................... 105

Table 36. Calibration Frequency ................................................................ 106

Table 37. UART Configurations ..................................................................111

Table 38. UART Rx Modes (Post ALRTRST Being Cleared) ...........................................117

Table 39. UART Rx Modes (Prior to ALRTRST Being Cleared) .........................................117

Table 40. Data Character Description ............................................................ 120

Table 41. Data Types ..........................................................................121

Table 42. Command Packet Types .............................................................. 122

Table 43. Battery-Management Protocol (Command-Byte Encoding) ................................... 122

Table 44. Data-Check Byte .................................................................... 123

Table 45. HELLOALL Command Packet .......................................................... 125

Table 46. HELLOALL Up-Path Sequencing........................................................ 125

Table 47. HELLOALL Down-Path Sequencing...................................................... 125

Table 48. WRITEALL Sequencing (Unchanged by Daisy-Chain) ....................................... 126

Table 49. WRITEDEVICE Sequencing (Unchanged by Daisy-Chain).................................... 126

Table 50. READALL Command Sequencing In Single-UART or

Dual-UART Up Path (z = Number of Devices)...................................................... 127

Table 51. READALL Command Sequencing In Dual-UART Down Path

(z = Number of Devices) ...................................................................... 128

Table 52. READDEVICE Sequencing In Single-UART or Dual-UART Up Path ............................ 129

Table 53. READDEVICE Sequencing In Dual-UART Down Path ....................................... 129

Table 54. READBLOCK Sequencing In Single-UART or Dual-UART Up Path (Block Size = 1) ............... 130

Table 55. READBLOCK Sequencing In Single-UART or Dual-UART Up Path (Block Size = 1) ............... 130

Table 56. READBLOCK Sequencing In Dual-UART Down Path (Block Size = 2) ...........................131

Table 57. READBLOCK Sequencing In Single-UART or Dual-UART Down Path (Block Size = 2) .............131

Table 58. DOWNHOST Sequencing (z = Total Number of Devices)..................................... 132

Table 59. UPHOST Sequencing (z = total number of devices) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133

Table 60. ALERTPACKET Sequencing ........................................................... 133

Table 61. SPI CRC Operation Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .141