Intel PXA270处理器家族开发者手册
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更新于2024-07-26
收藏 11.94MB PDF 举报 "PXA270芯片数据手册英文原版，是嵌入式系统开发者学习PXA270芯片开发的重要参考资料。这份手册由Intel公司于2004年发布，详细介绍了Intel PXA27x处理器家族的技术规格、功能特性和使用方法。"
Intel的PXA27x处理器家族是基于XScale微架构的一系列高效能、低功耗的处理器，广泛应用于移动设备和嵌入式系统中。PXA270作为该家族的一员，其主要特点包括：
1. **高性能CPU核心**: PXA270采用增强型XScale CPU内核，提供了多种时钟速度选项，如312MHz、400MHz、520MHz和624MHz，满足不同性能需求。
2. **集成的多媒体功能**: 支持MMX技术，增强了多媒体处理能力，适用于视频编码、解码和图像处理等应用。
3. **内存管理单元(MMU)**: 内置MMU允许运行复杂的操作系统，如Windows CE和Linux，提供虚拟地址映射和内存保护。
4. **电源管理**: 设计有精细的电源管理机制，可以动态调整工作频率和电压，以优化能效比。
5. **连接接口**: 集成了多种通信接口，如USB Host/Device、Ethernet MAC、UART、SPI、I2C和SD/MMC控制器，方便与各种外围设备连接。
6. **嵌入式存储器**: 支持SDRAM和SRAM等多种内存类型，以及ROM和闪存等非易失性存储器接口。
7. **GPIO和中断控制器**: 提供大量的通用输入/输出（GPIO）引脚和灵活的中断控制器，便于扩展硬件功能。
8. **安全特性**: 虽然不是设计用于医疗、生命维持或安全系统，但PXA270仍包含一些安全相关的功能，例如错误检测和处理机制。
这份数据手册详细阐述了PXA270处理器的寄存器配置、编程模型、中断系统、电源管理和调试工具等内容，对于开发者来说，是理解并利用PXA270进行系统设计和软件开发的关键参考。
然而，值得注意的是，Intel在文档中明确指出，提供的信息不构成任何明示或暗示的保修，包括对特定目的的适用性、适销性或侵犯任何专利、版权或其他知识产权的保修。同时，用户在使用Intel产品时，需要了解并遵守Intel的销售条款和条件，以及可能涉及的相关知识产权问题。这提示开发者在实际应用中需要考虑法律和许可问题。
在阅读和使用这份数据手册时，开发者应深入理解PXA270处理器的工作原理，并结合其他参考资料，如应用笔记、开发板手册和示例代码，以确保正确、有效地进行系统设计和软件编程。
xvi Intel® PXA27x Processor Family Developer’s Manual
Contents
21 Real-Time Clock (RTC) ..............................................................................................................21-1
21.1 Overview..........................................................................................................................21-1
21.2 Features...........................................................................................................................21-1
21.3 Signal Descriptions..........................................................................................................21-2
21.4 Operation.........................................................................................................................21-2
21.4.1 Timer...................................................................................................................21-5
21.4.2 Wristwatch ..........................................................................................................21-5
21.4.3 Stopwatch.........................................................................................................21-10
21.4.4 Periodic Interrupt ..............................................................................................21-11
21.4.5 Trimmer ............................................................................................................21-12
21.4.6 Low-Power Modes............................................................................................21-15
21.5 Register Descriptions.....................................................................................................21-15
21.5.1 RTC Trim Register (RTTR)...............................................................................21-16
21.5.2 RTC Status Register (RTSR)............................................................................21-17
21.5.3 RTC Alarm Register (RTAR) ............................................................................21-19
21.5.4 RTC Wristwatch Day Alarm Registers (RDARx) ..............................................21-20
21.5.5 RTC Wristwatch Year Alarm Registers (RYARx) .............................................21-21
21.5.6 RTC Stopwatch Alarm Registers (SWARx)......................................................21-22
21.5.7 RTC Periodic Interrupt Alarm Register (PIAR) .................................................21-23
21.5.8 RTC Counter Register (RCNR) ........................................................................21-24
21.5.9 RTC Day Counter Register (RDCR).................................................................21-24
21.5.10 RTC Year Counter Register (RYCR) ................................................................21-25
21.5.11 RTC Stopwatch Counter Register (SWCR)......................................................21-26
21.5.12 RTC Periodic Interrupt Counter Register (RTCPICR) ......................................21-26
21.6 Register Summary .........................................................................................................21-27
22 Operating System Timers...........................................................................................................22-1
22.1 Overview..........................................................................................................................22-1
22.2 Features...........................................................................................................................22-1
22.3 Signal Descriptions..........................................................................................................22-2
22.4 Operation.........................................................................................................................22-2
22.4.1 Block Diagrams...................................................................................................22-2
22.4.2 Compares and Matches......................................................................................22-4
22.4.3 PXA25x Processor Compatibility........................................................................22-5
22.4.4 Timer Channels ..................................................................................................22-5
22.4.5 Counter Resolutions ...........................................................................................22-5
22.4.6 External Synchronization (EXT_SYNC<1:0>) ....................................................22-6
22.4.7 Output Generation ..............................................................................................22-7
22.4.8 Snapshot Mode...................................................................................................22-8
22.4.9 Operation in Low-Power Modes .........................................................................22-8
22.5 Register Descriptions.......................................................................................................22-9
22.5.1 OS Match Control Registers (OMCRx)...............................................................22-9
22.5.2 OS Timer Match Registers (OSMRx) ...............................................................22-14
22.5.3 OS Timer Watchdog Match Enable Register (OWER) .....................................22-15
22.5.4 OS Timer Interrupt Enable Register (OIER) .....................................................22-16
22.5.5 OS Timer Count Register 0 (OSCR0)...............................................................22-16
22.5.6 OS Timer Count Registers (OSCR4–11)..........................................................22-17
22.5.7 OS Timer Status Register (OSSR) ...................................................................22-17
22.5.8 OS Timer Snapshot Register (OSNR)..............................................................22-18
22.6 Register Summary .........................................................................................................22-19
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