2498 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 60, NO. 8, AUGUST 2013
Wideband Impedance Model for Coaxial
Through-Silicon Vias in 3-D Integration
Feng Liang, Gaofeng Wang, Senior Member, IEEE, Deshuang Zhao, Member, IEEE,
and Bing-Zhong Wang, Member, IEEE
Abstract—Coaxial through-silicon via (TSV) is a promising
3-D integration solution, which can offer lower coupling with
its surrounding environment and achieve better electromagnetic
compatibility and signal integrity than other TSV structures.
In this paper, an analytical wideband equivalent circuit model
is proposed for the impedance modeling of coaxial TSVs in 3-D
integration. Closed-form formulas for calculations of the per-
unit-length resistance and the inductance of both the isolation
dielectric filled and silicon filled coaxial TSVs are derived
from the theory of quasi-magnetostatic fields. These formulas
appropriately capture the skin effect in metal as well as the
eddy current effect in silicon. Therefore, they yield accurate
results comparable with the full-wave solutions in a wideband
frequency range.
Index Terms— 3-D integration, coaxial through-silicon via
(TSV), eddy current, equivalent circuit model, skin effect,
wideband.
I. INTRODUCTION
T
O PROVIDE more functionality and higher performance,
the integrated circuits (ICs) are always scaling their sizes
down by Moore’s law. However, with the ICs shrinking into
the nanometer scale, new challenges are emerging from the
conventional planar IC structures due to fabrication process
complexity and physics limits. Fortunately, these challenges
may be overcome by a More than Moore solution, i.e., 3-D
integration and packaging [1]–[3]. 3-D ICs stack multilayer
dies with the vertical interconnects, and hence provide much
higher integration density and more functionality than planar
(or so-called 2-D) ICs. In 3-D integration and packaging,
through-silicon via (TSV) is the most prospective solution to
realize the vertical interconnections [3]. Recently, a number
of studies are carried out for electrical modeling of TSVs
[4]–[9], which can be used for further performance analysis
and design optimization.
In a real-world 3-D integration system, there is a need to
consider the impact of TSVs on other components, such as
Manuscript received April 2, 2013; revised May 19, 2013; accepted
June 10, 2013. Date of publication July 3, 2013; date of current version
July 19, 2013. This work was supported by the National Natural Science
Foundation of China under Grant 61204041. The review of this paper was
arranged by Editor N. Bhat.
F. Liang, D. Zhao, and B.-Z. Wang are with the School of Physical Elec-
tronics, University of Electronic Science and Technology of China, Chengdu
610054, China (e-mail: fengliang@uestc.edu.cn; dszhao@uestc.edu.cn;
bzwang@uestc.edu.cn).
G. Wang is with the Institute of Microelectronics and Information Technol-
ogy, Wuhan University, Wuhan 430072, China, and also with the School of
Electronics and Information, Hangzhou Dianzi University, Zhejiang 310018,
China (e-mail: gaofeng.wang@alumni.stanford.edu).
Color versions of one or more of the figures in this paper are available
online at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TED.2013.2268869
the coupling noise from TSVs to their neighbor interconnects
or the active region [10]. The coupling noise and signal
loss of on-chip interconnects in silicon substrate are the key
design issues and require careful modeling and characteriza-
tion [11], [12]. To reduce the coupling noise and signal loss in
silicon substrate, coaxial TSVs with an excellent self-shielding
and self-isolation capability are proposed [13], [14].
Electrical modeling and characterization of coaxial TSVs
were investigated in [15]–[19]. In [15], three novel coaxial
TSV configurations were proposed and studied with full-wave
electromagnetic field simulations. In [16] and [19], the coaxial
TSVs were modeled by an equivalent distributed resistance-
inductance-capacitance-conductance (RLCG) circuit model.
The C and G parameters are calculated by considering the
metal–oxide–semiconductor (MOS) effect [16], [17]. The R
and L parameters are extracted by the partial element equiva-
lent circuit (PEEC) simulation [17]. The approach employing
the PEEC numerical simulation is accurate but time consuming
and memory intensive.
In [18] and [19], the RLCG parameters were calculated from
simple closed-form formulas that are usually used for coaxial-
cable transmission lines. However, the RL models in [18] and
[19] were not rigorously derived for wideband applications.
In addition the semiconductor effect of silicon substrate is
not considered in these closed-form RL models. An efficient
wideband impedance model for coaxial TSVs is still an acute
need for electrical modeling, large-scale analysis, and design
optimization of 3-D integration and packaging.
This paper focuses on an efficient electrical modeling of
coaxial TSVs with physics-based wideband impedance model.
With the quasi-magnetostatic theory, closed-form formulas for
the per-unit-length (p.u.l) resistance and inductance calcula-
tions are derived. The model proposed in this paper appropri-
ately captures the important parasitic effects in coaxial TSVs,
such as skin effect in conductors and semiconductor effect of
silicon. Thus, it yields accurate results comparable with 3-D
full-wave solutions in a wideband frequency range. The rest of
this paper is organized as follows. In Section II, the existing
equivalent circuit model for coaxial TSVs is reviewed. The
wideband RL model for isolation dielectric filled and silicon
filled coaxial TSVs is then derived in Section III, and validated
by comparison with the full-wave solutions in Section IV.
Finally, a conclusion is given in Section V.
II. E
QUIVALENT CIRCUIT MODEL
Similar to coaxial cables in microwave transmission lines,
coaxial TSVs use inner conductor as the signal line and
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