EM357 Data Sheet

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EM350

High-Performance, Integrated ZigBee/802.15.4 System-on-Chip



Complete System-on-Chip

•

32-bit ARM

Cortex-M3 processor

•

2.4 GHz IEEE 802.15.4 transceiver & lower MAC

•

128 kB flash, 8kB RAM memory

•

AES128 encryption accelerator

•

Flexible ADC, SPI/UART/TWI serial

communications, and general purpose timers

•

24 highly configurable GPIO with Schmitt

trigger inputs



Industry-leading ARM Cortex-M3 processor

•

Leading 32-bit processing performance

•

Highly efficient Thumb-2 instruction set

•

Operation at 6, 12 or 24 MHz

•

Flexible Nested Vectored Interrupt Controller



Low power consumption, advanced management

•

RX Current (w/ CPU): 27 mA

•

TX Current (w/ CPU, +3 dBm TX): 31 mA

•

Low deep sleep current, with retained RAM and

GPIO: 400 nA/800 nA with/without sleep timer

•

Low-frequency internal RC oscillator for low-

power sleep timing

•

High-frequency internal RC oscillator for fast

(100 µsec) processor start-up from sleep



Exceptional RF Performance

•

Normal mode Link Budget up to 102 dB;

configurable up to 107 dB

•

-99 dBm normal RX sensitivity;

configurable to -100 dBm

(1% PER, 20 byte packet)

•

+3 dB normal mode output power;

configurable up to +7 dBm

•

Robust WiFi and Bluetooth coexistence



Innovative network and processor debug

•

Ember InSight Port for non-intrusive

packet trace with Ember InSight tools

•

Serial Wire/JTAG interface

•

Standard ARM debug capabilities: Flash

Patch & Breakpoint; Data Watchpoint &

Trace; Instrumentation Trace Macrocell



Application Flexibility

•

Single voltage operation: 2.1-3.6 V

with internal 1.8 V and 1.25 V regulators

•

Optional 32.768 kHz crystal for higher

timer accuracy

•

Low external component count with

single 24 MHz crystal

•

Support for external power amplifier

•

Small 7x7 mm 48-pin QFN package

Ember Corporation

47 Farnsworth Street

Boston MA 02210 USA

+1 617.951.0200

www.ember.com

120-0350-000A

Advanced

November 9, 2008

EM350

General Description

The EM350 is a fully integrated System-on-Chip that integrates a 2.4 GHz, IEEE 802.15.4-compliant

transceiver, 32-bit ARM

Cortex M3 microprocessor, flash and RAM memory, and peripherals of use to

designers of ZigBee-based systems.

The transceiver utilizes an efficient architecture that exceeds the dynamic range requirements imposed by

the IEEE 802.15.4-2003 standard by over 15 dB. The integrated receive channel filtering allows for robust co-

existence with other communication standards in the 2.4 GHz spectrum, such as IEEE 802.11 and Bluetooth.

The integrated regulator, VCO, loop filter, and power amplifier keep the external component count low. An

optional high performance radio mode (boost mode) is software-selectable to boost dynamic range.

The integrated 32-bit ARM

Cortex M3 microprocessor is highly optimized for high performance, low power

consumption, and efficient memory utilization. Including an integrated MPU, it supports two different modes

of operation—System Mode and Application Mode. The networking stack software runs in System Mode with full

access to all areas of the chip. Application code runs in Application Mode with limited access to the EM350

resources; this allows for the scheduling of events by the application developer while preventing modification

of restricted areas of memory and registers. This architecture results in increased stability and reliability of

deployed solutions.

The EM350 has 128 kB of embedded flash memory and 8 kB of integrated RAM for data and program storage.

The EM350 HAL software employs an effective wear-leveling algorithm that optimizes the lifetime of the

embedded Flash.

To maintain the strict timing requirements imposed by the ZigBee and IEEE 802.15.4-2003 standards, the

EM350 integrates a number of MAC functions into the hardware. The MAC hardware handles automatic ACK

transmission and reception, automatic backoff delay, and clear channel assessment for transmission, as well

as automatic filtering of received packets. The Ember Packet Trace Interface is also integrated with the MAC,

allowing complete, non-intrusive capture of all packets to and from the EM350 with Ember’s InSight

Development tools.

The EM350 offers a number of advanced power management features that enable long battery life. A high-

frequency internal RC oscillator allows the processor core to begin code execution quickly upon waking.

Various deep sleep modes are available with less than 1 µA power consumption while retaining RAM contents.

To support user-defined applications, on-chip peripherals include UART, SPI, TWI, ADC and general-purpose

timers, as well as up to 24 GPIOs. Additionally, an integrated voltage regulator, power-on-reset circuit, and

sleep timer are available.

Finally, the EM350 utilizes standard Serial Wire and JTAG interfaces for powerful software debugging and

programming of the ARM Cortex-M3 core. The EM350 integrates the standard ARM system debug components:

Flash Patch and Breakpoint (FPB), Data Watchpoint and Trace (DWT), and Instrumentation Trace Macrocell

(DWT).

Target applications for the EM350 include:

•

Smart Energy

•

Building automation and control

•

Home automation and control

•

Security and monitoring

•

General ZigBee wireless sensor networking

This technical datasheet details the EM350 features available to customers using it with Ember HAL software.

Advanced 120-0350-000A

EM350

Contents

1 Pin Assignments 1-1

2 Electrical Characteristics 2-1

2.1 Absolute Maximum Ratings 2-1

2.2 Recommended Operating

Conditions 2-1

2.3 Environmental Characteristics 2-2

2.4 DC Electrical Characteristics 2-2

2.5 Digital I/O Specifications 2-5

2.6 Non-RF System Electrical

Characteristics 2-6

2.7 RF Electrical Characteristics 2-7

2.7.1 Receive 2-7

2.7.2 Transmit 2-8

2.7.3 Synthesizer 2-8

3 Top-Level Functional Description 3-1

4 Radio Module 4-1

4.1 Receive (Rx) Path 4-1

4.1.1 Rx Baseband 4-1

4.1.2 RSSI and CCA 4-1

4.2 Transmit (Tx) Path 4-1

4.2.1 Tx Baseband 4-1

4.2.2 TX_ACTIVE and nTX_ACTIVE

Signals 4-1

4.3 Calibration 4-2

4.4 Integrated MAC Module 4-2

4.5 Packet Trace Interface (PTI) 4-2

4.6 Random Number Generator 4-2

5 ARM

Cortex-M3 and Memory

Modules 5-1

5.1 ARM

Cortex-M3 Microprocessor 5-1

5.2 Embedded Memory 5-2

5.2.1 Flash Memory 5-3

5.2.2 RAM 5-6

5.2.3 Registers 5-7

5.3 Memory Protection Unit 5-7

6 System Modules 6-1

6.1 Power domains 6-2

6.1.1 Internally regulated power 6-2

6.1.2 Externally regulated power 6-2

6.2 Resets 6-2

6.2.1 Reset Sources 6-3

6.2.2 Reset Recording 6-4

6.2.3 Reset Generation 6-5

6.3 Clocks 6-5

6.3.1 High-Frequency Internal RC

Oscillator (OSCHF) 6-7

6.3.2 High-Frequency Crystal

Oscillator (OSC24M) 6-7

6.3.3 Low-Frequency Internal RC

Oscillator (OSCRC) 6-8

6.3.4 Low-Frequency Crystal

Oscillator (OSC32K) 6-9

6.3.5 Clock Switching 6-9

6.4 System Timers 6-10

6.4.1 Watchdog Timer 6-10

6.4.2 Sleep Timer 6-10

6.4.3 Event Timer 6-10

6.5 Power Management 6-10

6.5.1 Wake Sources 6-11

6.5.2 Basic Sleep Modes 6-12

6.5.3 Further options for deep

sleep 6-13

6.5.4 Use of debugger with sleep

modes 6-13

6.6 Security Accelerator 6-13

7 GPIO (General Purpose Input /

Output) 7-1

7.1 GPIO Ports 7-1

7.2 Configuration 7-2

7.3 Forced Functions 7-3

7.4 Reset 7-4

7.5 nBOOTMODE 7-4

7.6 GPIO Modes 7-4

7.6.1 Analog Mode 7-4

7.6.2 Input Mode 7-4

7.6.3 Output Mode 7-5

7.6.4 Alternate Output Mode 7-5

7.6.5 Alternate Output SPI SCLK

Mode 7-5

7.7 Wake Monitoring 7-6

7.8 External Interrupts 7-6

7.9 Debug Control and Status 7-7

7.10 GPIO Signal Assignment Summary 7-7

7.11 Registers 7-9

8 Serial Controllers 8-1

8.1 Overview 8-1

8.2 Configuration 8-2

8.2.1 Registers 8-3

8.3 SPI - Master Mode 8-6

8.3.1 GPIO Usage 8-6

8.3.2 Set Up and Configuration 8-7

8.3.3 Operation 8-8

Advanced 120-0350-000A

EM350

8.3.4 Interrupts 8-9

10 ADC (Analog to Digital Converter) 10-1

8.3.5 Registers 8-10

10.1 Setup and Configuration 10-1

8.4 SPI - Slave Mode 8-14

10.1.1 GPIO Usage 10-2

8.4.1 GPIO Usage 8-14

10.1.2 Voltage Reference 10-2

8.4.2 Set Up and Configuration 8-15

10.1.3 Offset/Gain Correction 10-2

8.4.3 Operation 8-16

10.1.4 DMA 10-2

8.4.4 DMA 8-17

10.1.5 ADC Configuration

8.4.5 Interrupts 8-17

8.4.6 Registers 8-18

10.2 Interrupts 10-5

8.5 TWI - Two Wire serial Interfaces 8-18

10.3 Operation 10-6

8.5.1 GPIO Usage 8-18

10.4 Calibration 10-7

8.5.2 Set Up and Configuration 8-18

10.5 ADC Key Parameters 10-8

8.5.3 Constructing Frames 8-19

10.6 Registers 10-12

8.5.4 Interrupts 8-21

8.5.5 Registers 8-22

11 Interrupt System 11-1

8.6 UART - Universal Asynchronous

Receiver / Transmitter 8-24

11.1 Nested Vectored Interrupt

Controller (NVIC) 11-1

8.6.1 GPIO Usage 8-24

11.2 Event Manager 11-3

8.6.2 Set Up and Configuration 8-24

11.3 Non-maskable Interrupt (NMI) 11-6

8.6.3 FIFOs 8-26

11.4 Faults 11-6

8.6.4 RTS/CTS Flow control 8-26

8.6.5 DMA 8-27

11.5 Registers 11-7

8.6.6 Interrupts 8-27

12 Trace Port Interface Unit (TPIU) 12-1

8.6.7 Registers 8-28

13 Instrumentation Trace Macrocell

(ITM) 13-1

8.7 DMA Channels 8-31

8.7.1 Registers 8-32

14 Data Watchpoint and Trace

(DWT) 14-1

9 General Purpose Timers (TIM1 and

TIM2) 9-1

15 Flash Patch and Breakpoint

(FPB) 15-1

9.1 Introduction 9-1

9.2 GPIO Usage 9-3

16 Integrated Voltage Regulator 16-1

9.3 Timer Functional Description 9-3

9.3.1 Time-Base Unit 9-3

17 Serial Wire and JTAG (SWJ)

Interface 17-1

9.3.2 Counter Modes: 9-4

9.3.3 Clock Selection 9-9

18 Typical Application 18-1

9.3.4 Capture/Compare Channels 9-12

9.3.5 Input Capture Mode 9-14

19 Mechanical Details 19-1

9.3.6 PWM Input Mode 9-15

19.1 QFN48 Footprint

Recommendations 19-1

9.3.7 Forced Output Mode 9-16

9.3.8 Output Compare Mode 9-16

19.2 Solder Temperature Profile 19-3

9.3.9 PWM Mode 9-17

20 Part Marking 20-1

9.3.10 One-Pulse Mode 9-20

9.3.11 Encoder Interface Mode 9-21

21 Ordering Information 21-1

9.3.12 Timer Input XOR Function 9-23

22 Shipping Box Label 22-1

9.3.13 Timers and External

Trigger Synchronization 9-23

Appendix A Register Address Table A-1

9.3.14 Timer Synchronization 9-26

9.3.15 Timer Signal Descriptions 9-30

Appendix B Abbreviations and

Acronyms B-1

9.4 Interrupts 9-31

9.5 Registers 9-32

Appendix C References C-1

Advanced 120-0350-000A

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