DRV8302三相栅极驱动器技术文档

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"TI-DRV8302.pdf" DRV8302是德州仪器(TI)推出的一款高性能、高集成度的三相栅极驱动器，特别适合于各种电动马达驱动应用，如三相无刷直流(BLDC)电机和永磁同步电机(PMSM)。这款芯片在设计上融合了多种功能，以实现高效、可靠的电机控制。该器件工作电源电压范围广泛，从8V到60V，能够适应各种不同的电源条件。其强大的栅极驱动能力可驱动1.7A的拉电流和2.3A的灌电流，这使得它能够驱动大容量的N-Channel MOSFETs，从而处理较大的电机电流。同时，DRV8302支持100%的占空比，这意味着它可以在整个周期内连续工作，为全速或精确控制提供了可能。 DRV8302具备6种或3种PWM输入模式，以满足不同控制策略的需求，例如六步换向、方波或FOC（磁场定向控制）等。集成的双路分流放大器允许用户根据需要调整增益和偏移，以实现精确的电流感测。此外，该驱动器兼容3.3V和5V的逻辑电平，可以方便地与各种微控制器(MCU)接口。硬件控制接口简化了系统的构建，允许直接通过物理信号对驱动器进行操作，而无需复杂的软件干预。保护特性是DRV8302的另一大亮点，包括可编程死区控制(DTC)以防止直通，可编程过流保护(OCP)确保电机安全，PVDD和GVDD欠压锁定(UVLO)防止工作在不稳定的电源条件下，GVDD过压锁定(OVLO)保护驱动器免受过高电压的影响，过热警告/关断(OTW/OTS)则可以预防设备过热，所有这些保护功能都可通过nFAULT和nOCTW引脚进行状态报告，为系统提供实时监控和故障反馈。在应用方面，DRV8302广泛应用于医疗设备（如持续正压通气(CPAP)机）、电动自行车、电动工具、机器人、遥控(RC)玩具以及工业自动化等多个领域。其紧凑的设计和全面的功能使得它成为电机驱动解决方案的理想选择，特别是对于那些要求高效能、高可靠性和低功耗的应用场景。 DRV8302是一款针对三相电机驱动应用优化的门驱动器，它集成了强大的驱动能力、灵活的控制选项和全面的保护机制，为设计者提供了高效且可靠的电机控制系统。通过TI的官方渠道，用户可以获取详细的技术文档、工具软件以及社区支持，便于产品开发和问题解决。

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DRV8302

ZHCS138C –AUGUST 2011–REVISED MARCH 2016

www.ti.com.cn

6.3 Recommended Operating Conditions

MIN NOM MAX UNIT

PVDD

DC supply voltage PVDD1 for normal operation Relative to PGND 8 60 V

DC supply voltage PVDD2 for buck converter 3.5 60 V

DIN_EN

Input current of digital pins when EN_GATE is high 100 µA

DIN_DIS

Input current of digital pins when EN_GATE is low 1 µA

O_OPA

Maximum output capacitance on outputs of shunt amplifier 20 pF

DTC

Dead time control resistor range. Time range is 50 ns (–GND) to 500 ns (150 kΩ) with a

linear approximation.

0 150 kΩ

FAULT

FAULT pin sink current. Open drain V = 0.4 V 2 mA

OCTW

OCTW pin sink current. Open drain V = 0.4 V 2 mA

REF

External voltage reference voltage for current shunt amplifiers 2 6 V

gate

Operating switching frequency of gate driver

Qg(TOT) = 25 nC or total 30-mA gate

drive average current

200 kHz

Ambient temperature –40 125 °C

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report (SPRA953).

6.4 Thermal Information

THERMAL METRIC

(1)

DRV8302

UNITDCA (HTSSOP)

56 PINS

θJA

Junction-to-ambient thermal resistance 30.3 °C/W

θJC(top)

Junction-to-case (top) thermal resistance 33.5 °C/W

θJB

Junction-to-board thermal resistance 17.5 °C/W

Junction-to-top characterization parameter 0.9 °C/W

Junction-to-board characterization parameter 7.2 °C/W

θJC(bot)

Junction-to-case (bottom) thermal resistance 0.9 °C/W

DRV8302

www.ti.com.cn

ZHCS138C –AUGUST 2011–REVISED MARCH 2016

6.5 Electrical Characteristics

PVDD = 8 V to 60 V, T

= 25°C, unless specified under test condition

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

INPUT PINS: INH_X, INL_X, M_PWM, M_OC, GAIN, EN_GATE, DC_CAL

High input threshold 2 V

Low input threshold 0.8 V

EN_GATE

Internal pulldown resistor for EN_GATE 100 kΩ

INH_X

Internal pulldown resistor for high side PWMs

(INH_A, INH_B, and INH_C)

EN_GATE high 100 kΩ

INH_X

Internal pulldown resistor for low side PWMs

(INL_A, INL_B, and INL_C)

EN_GATE high 100 kΩ

M_PWM

Internal pulldown resistor for M_PWM EN_GATE high 100 kΩ

M_OC

Internal pulldown resistor for M_OC EN_GATE high 100 kΩ

DC_CAL

Internal pulldown resistor for DC_CAL EN_GATE high 100 kΩ

OUTPUT PINS: nFAULT AND nOCTW

Low output threshold I

= 2 mA 0.4 V

High output threshold

External 47-kΩ pullup resistor connected to

3-5.5 V

2.4 V

Leakage current on open-drain pins When logic

high (nFAULT and nOCTW)

1 µA

GATE DRIVE OUTPUT: GH_A, GH_B, GH_C, GL_A, GL_B, GL_C

GX_NORM

Gate driver Vgs voltage PVDD = 8 V to 60 V 9.5 11.5 V

oso1

Maximum source current setting 1, peak Vgs of FET equals to 2 V 1.7 A

osi1

Maximum sink current setting 1, peak Vgs of FET equals to 8 V 2.3 A

gate_off

Gate output impedance during standby mode

when EN_GATE low (pins GH_x, GL_x)

1.6 2.4 kΩ

SUPPLY CURRENTS

PVDD1_STB

PVDD1 supply current, standby EN_GATE is low. PVDD1 = 8 V. 20 50 µA

PVDD1_OP

PVDD1 supply current, operating

EN_GATE is high, no load on gate drive

output, switching at 10 kHz,

100-nC gate charge

15 mA

PVDD1_HIZ

PVDD1 Supply current, HiZ EN_GATE is high, gate not switching 2 5 11 mA

INTERNAL REGULATOR VOLTAGE

VDD

AVDD voltage 6 6.5 7 V

VDD

DVDD voltage 3 3.3 3.6 V

VOLTAGE PROTECTION

PVDD_UV

Undervoltage protection limit, PVDD 6 V

GVDD_UV

Undervoltage protection limit, GVDD 8 V

GVDD_OV

Overvoltage protection limit, GVDD 16 V

CURRENT PROTECTION, (VDS SENSING)

DS_OC

Drain-source voltage protection limit 0.125 2.4 V

OC sensing response time 1.5 µs

OC_PULSE

OCTW pin reporting pulse stretch length for OC

event

64 µs

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