SystemVerilog验证实战：测试平台语言特性指南(第3版)

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"SystemVerilog for Veriﬁcation (3ed)" 是一本专注于学习SystemVerilog测试平台语言特性的指南，由Chris Spear和Greg Tumbush合著。这本书的第三版详细介绍了SystemVerilog在验证中的应用，对于理解和掌握这一重要的硬件验证语言具有很高的指导价值。 SystemVerilog是一种强大的硬件描述语言，广泛用于集成电路（IC）设计的验证。它不仅扩展了传统的Verilog语言，还引入了许多高级功能，以支持更高效、更结构化的验证方法学。在验证过程中，SystemVerilog提供了高级数据类型、类、接口、覆盖点、随机化等特性，极大地增强了测试平台的构建和管理能力。本书的核心内容可能包括以下几个方面： 1. **基础语法与数据类型**：SystemVerilog提供了丰富的数据类型，如位矢量、整型、枚举、数组、结构体等，这使得在描述复杂系统时更加灵活。此外，它还有动态数组和打包类型的特性，方便处理变长数据。 2. **类与对象**：SystemVerilog引入了面向对象编程的概念，允许创建用户自定义的数据类型和行为，从而实现模块的复用和封装。类可以包含数据成员、构造函数、操作符重载等，这对于构建复杂的验证环境非常有用。 3. **接口**：接口是SystemVerilog中一种强大的模块间通信机制，它定义了一组独立于实现的端口，可以用于模块间的连接和参数化。 4. **随机化**：SystemVerilog的随机化功能使得生成测试激励变得更加智能和高效。它可以结合约束条件，自动生成符合特定规则的随机序列，提高测试覆盖率。 5. **覆盖点与度量**：SystemVerilog提供了内置的覆盖机制，允许开发者定义覆盖点并收集验证覆盖率数据，以评估验证的完整性。 6. **任务与函数**：除了常规的进程（process）外，SystemVerilog还支持任务和函数，它们可以有返回值，支持参数传递，并能嵌套使用，增强了代码的可读性和可维护性。 7. **多线程与并行**：SystemVerilog支持并发和同步的概念，允许在验证环境中模拟多个执行路径，模拟复杂的时序行为。 8. **包与宏**：包（package）可以用来组织和重用代码，而宏定义则允许预处理器进行文本替换，简化代码的编写和维护。 "SystemVerilog for Veriﬁcation (3ed)" 这本书详细介绍了SystemVerilog在验证领域的各种特性，对于硬件设计工程师和验证工程师来说，是一本宝贵的参考资料，可以帮助他们有效地提升验证效率和质量。

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1 Veriﬁ cation Guidelines............................................................................ 1

1.1 The Veriﬁ cation Process ................................................................ 2

1.1.1 Testing at Different Levels ............................................... 3

1.1.2 The Veriﬁ cation Plan ........................................................ 4

1.2 The Veriﬁ cation Methodology Manual .......................................... 4

1.3 Basic Testbench Functionality ....................................................... 5

1.4 Directed Testing ............................................................................. 5

1.5 Methodology Basics ...................................................................... 6

1.6 Constrained-Random Stimulus ...................................................... 8

1.7 What Should You Randomize? ...................................................... 9

1.7.1 Device and Environment Conﬁ guration........................... 9

1.7.2 Input Data ......................................................................... 10

1.7.3 Protocol Exceptions, Errors, and Violations .................... 10

1.7.4 Delays and Synchronization ............................................. 11

1.7.5 Parallel Random Testing .................................................. 11

1.8 Functional Coverage ...................................................................... 12

1.8.1 Feedback from Functional Coverage to Stimulus ............ 12

1.9 Testbench Components .................................................................. 13

1.10 Layered Testbench .......................................................................... 14

1.10.1 A Flat Testbench ............................................................... 14

1.10.2 The Signal and Command Layers .................................... 17

1.10.3 The Functional Layer ....................................................... 17

1.10.4 The Scenario Layer .......................................................... 18

1.10.5 The Test Layer and Functional Coverage ........................ 18

1.11 Building a Layered Testbench ........................................................ 19

1.11.1 Creating a Simple Driver ................................................. 20

1.12 Simulation Environment Phases .................................................... 20

1.13 Maximum Code Reuse ................................................................... 21

1.14 Testbench Performance .................................................................. 22

1.15 Conclusion...................................................................................... 22

1.16 Exercises ........................................................................................ 23

Contents

xvi

Contents

2 Data Types ............................................................................................... 25

2.1 Built-In Data Types ........................................................................ 25

2.1.1 The Logic Type .............................................................. 26

2.1.2 2-State Data Types ........................................................... 26

2.2 Fixed-Size Arrays .......................................................................... 27

2.2.1 Declaring and Initializing Fixed-Size Arrays ................... 28

2.2.2 The Array Literal .............................................................. 29

2.2.3 Basic Array Operations —

for and Foreach ................. 30

2.2.4 Basic Array Operations – Copy and Compare ................. 32

2.2.5 Bit and Array Subscripts, Together at Last ...................... 32

2.2.6 Packed Arrays................................................................... 33

2.2.7 Packed Array Examples ................................................... 33

2.2.8 Choosing Between Packed and Unpacked Arrays ........... 34

2.3 Dynamic Arrays ............................................................................. 35

2.4 Queues ........................................................................................... 36

2.5 Associative Arrays ......................................................................... 38

2.6 Array Methods ............................................................................... 41

2.6.1 Array Reduction Methods ................................................ 41

2.6.2 Array Locator Methods .................................................... 42

2.6.3 Array Sorting and Ordering ............................................. 44

2.6.4 Building a Scoreboard with Array Locator Methods ....... 45

2.7 Choosing a Storage Type ............................................................... 46

2.7.1 Flexibility ......................................................................... 46

2.7.2 Memory Usage ................................................................. 46

2.7.3 Speed ................................................................................ 47

2.7.4 Data Access ...................................................................... 47

2.7.5 Choosing the Best Data Structure .................................... 48

2.8 Creating New Types with typedef .......................................... 48

2.9 Creating User-Deﬁ ned Structures .................................................. 50

2.9.1 Creating a Struct and a New Type ............................... 50

2.9.2 Initializing a Structure ...................................................... 51

2.9.3 Making a Union of Several Types .................................... 51

2.9.4 Packed Structures ............................................................. 52

2.9.5 Choosing Between Packed and Unpacked Structures ...... 52

2.10 Packages ......................................................................................... 53

2.11 Type Conversion ............................................................................ 54

2.11.1 The Static Cast ................................................................. 54

2.11.2 The Dynamic Cast ............................................................ 55

2.12 Streaming Operators....................................................................... 55

2.13 Enumerated Types .......................................................................... 57

2.13.1 Deﬁ ning Enumerated Values ............................................ 58

2.13.2 Routines for Enumerated Types ....................................... 59

2.13.3 Converting to and from Enumerated Types ..................... 60

xvii

Contents

2.14 Constants ........................................................................................ 61

2.15 Strings ............................................................................................ 61

2.16 Expression Width ........................................................................... 62

2.17 Conclusion...................................................................................... 63

2.18 Exercises ........................................................................................ 64

3 Procedural Statements and Routines .................................................... 69

3.1 Procedural Statements .................................................................... 69

3.2 Tasks, Functions, and Void Functions ............................................ 71

3.3 Task and Function Overview ......................................................... 72

3.3.1 Routine Begin…End Removed ........................................ 72

3.4 Routine Arguments ......................................................................... 72

3.4.1 C-style Routine Arguments ................................................ 72

3.4.2 Argument Direction ........................................................... 73

3.4.3 Advanced Argument Types ................................................ 73

3.4.4 Default Value for an Argument .......................................... 75

3.4.5 Passing Arguments by Name ............................................. 76

3.4.6 Common Coding Errors ..................................................... 77

3.5 Returning from a Routine............................................................... 78

3.5.1 The Return Statement ......................................................... 78

3.5.2 Returning an Array from a Function .................................. 78

3.6 Local Data Storage ......................................................................... 79

3.6.1 Automatic Storage .............................................................. 80

3.6.2 Variable Initialization ......................................................... 80

3.7 Time Values .................................................................................... 81

3.7.1 Time Units and Precision ................................................... 81

3.7.2 Time Literals ...................................................................... 82

3.7.3 Time and Variables ............................................................. 82

3.7.4 $time vs. $realtime ............................................................. 83

3.8 Conclusion...................................................................................... 83

3.9 Exercises ........................................................................................ 83

4 Connecting the Testbench and Design................................................... 87

4.1 Separating the Testbench and Design ............................................. 88

4.1.1 Communication Between the Testbench and DUT ............ 88

4.1.2 Communication with Ports ................................................. 89

4.2 The Interface Construct .................................................................. 90

4.2.1 Using an Interface to Simplify Connections ...................... 91

4.2.2 Connecting Interfaces and Ports......................................... 93

4.2.3 Grouping Signals in an Interface Using Modports ............ 94

4.2.4 Using Modports with a Bus Design ................................... 95

4.2.5 Creating an Interface Monitor ............................................ 95

4.2.6 Interface Trade-Offs ........................................................... 96

4.2.7 More Information and Examples ....................................... 97

4.2.8 Logic vs. Wire in an Interface ............................................ 97

xviii

Contents

4.3 Stimulus Timing ............................................................................. 98

4.3.1 Controlling Timing of Synchronous Signals

with a Clocking Block ...................................................... 98

4.3.2 Timing Problems in Verilog ............................................. 99

4.3.3 Testbench – Design Race Condition ................................ 100

4.3.4 The Program Block and Timing Regions ......................... 101

4.3.5 Specifying Delays Between the Design and Testbench ... 103

4.4 Interface Driving and Sampling ..................................................... 104

4.4.1 Interface Synchronization ................................................ 104

4.4.2 Interface Signal Sample ................................................... 105

4.4.3 Interface Signal Drive ...................................................... 106

4.4.4 Driving Interface Signals Through a Clocking Block ...... 106

4.4.5 Bidirectional Signals in the Interface ............................... 108

4.4.6 Specifying Delays in Clocking Blocks ............................ 109

4.5 Program Block Considerations ...................................................... 110

4.5.1 The End of Simulation ..................................................... 110

4.5.2 Why are

Always Blocks not Allowed

in a Program? ................................................................... 111

4.5.3 The Clock Generator ........................................................ 111

4.6 Connecting It All Together ............................................................. 112

4.6.1 An Interface in a Port List Must Be Connected ............... 113

4.7 Top-Level Scope ............................................................................ 114

4.8 Program–Module Interactions ........................................................ 115

4.9 SystemVerilog Assertions............................................................... 116

4.9.1 Immediate Assertions ....................................................... 116

4.9.2 Customizing the Assertion Actions .................................. 117

4.9.3 Concurrent Assertions ...................................................... 118

4.9.4 Exploring Assertions ........................................................ 118

4.10 The Four-Port ATM Router ............................................................ 119

4.10.1 ATM Router with Ports .................................................... 119

4.10.2 ATM Top-Level Module with Ports ................................. 120

4.10.3 Using Interfaces to Simplify Connections ....................... 123

4.10.4 ATM Interfaces................................................................. 124

4.10.5 ATM Router Model Using an Interface ........................... 124

4.10.6 ATM Top Level Module with Interfaces .......................... 125

4.10.7 ATM Testbench with Interface ......................................... 125

4.11 The Ref Port Direction ................................................................... 126

4.12 Conclusion...................................................................................... 127

4.13 Exercises ........................................................................................ 128

5 Basic OOP ................................................................................................ 131

5.1 Introduction .................................................................................... 131

5.2 Think of Nouns, not Verbs ............................................................. 132

5.3 Your First Class .............................................................................. 133

5.4 Where to Deﬁ ne a Class ................................................................. 133

5.5 OOP Terminology .......................................................................... 134

xix

Contents

5.6 Creating New Objects .................................................................... 135

5.6.1 Handles and Constructing Objects ................................... 135

5.6.2 Custom Constructor ......................................................... 136

5.6.3 Separating the Declaration and Construction ................... 137

5.6.4 The Difference Between New() and New[] ..................... 138

5.6.5 Getting a Handle on Objects ............................................ 138

5.7 Object Deallocation ........................................................................ 139

5.8 Using Objects ................................................................................. 140

5.9 Class Methods ................................................................................ 141

5.10 Deﬁ ning Methods Outside of the Class ......................................... 142

5.11 Static Variables vs. Global Variables .............................................. 143

5.11.1 A Simple Static Variable .................................................. 143

5.11.2 Accessing Static Variables Through the Class Name ....... 144

5.11.3 Initializing Static Variables .............................................. 145

5.11.4 Static Methods .................................................................. 145

5.12 Scoping Rules................................................................................. 146

5.12.1 What is

This? ................................................................ 148

5.13 Using One Class Inside Another .................................................... 149

5.13.1 How Big or Small Should My Class Be? ......................... 151

5.13.2 Compilation Order Issue .................................................. 151

5.14 Understanding Dynamic Objects ................................................... 152

5.14.1 Passing Objects and Handles to Methods ........................ 152

5.14.2 Modifying a Handle in a Task .......................................... 153

5.14.3 Modifying Objects in Flight ............................................. 154

5.14.4 Arrays of Handles ............................................................ 155

5.15 Copying Objects ............................................................................. 156

5.15.1 Copying an Object with the New Operator ....................... 156

5.15.2 Writing Your Own Simple Copy Function ....................... 158

5.15.3 Writing a Deep Copy Function ........................................ 159

5.15.4 Packing Objects to and from Arrays Using

Streaming Operators......................................................... 161

5.16 Public vs. Local .............................................................................. 162

5.17 Straying Off Course ....................................................................... 163

5.18 Building a Testbench ...................................................................... 163

5.19 Conclusion...................................................................................... 164

5.20 Exercises ........................................................................................ 165

6 Randomization ........................................................................................ 169

6.1 Introduction .................................................................................... 169

6.2 What to Randomize ........................................................................ 170

6.2.1 Device Conﬁ guration ....................................................... 170

6.2.2 Environment Conﬁ guration .............................................. 171

6.2.3 Primary Input Data ........................................................... 171

6.2.4 Encapsulated Input Data .................................................. 171

6.2.5 Protocol Exceptions, Errors, and Violations .................... 172

6.2.6 Delays ............................................................................... 172

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