Table of Contents xxi
8.3 Digital DfT............................................................................................199
8.3.1 Design Partitioning..................................................................199
8.3.2 Scan Path Test .........................................................................200
8.3.3 Built-In Self-Test (BIST).........................................................204
8.3.4 1149.1 Boundary Scan.............................................................208
8.3.5 P1500 Core Test Standard Development.................................212
8.4 Analogue and Mixed-Signal DfT..........................................................212
8.4.1 Overview .................................................................................212
8.4.2 1149.4 Mixed-Signal Test Bus ................................................215
8.5 Future Directions for DfT and BIST .....................................................217
8.6 Summary...............................................................................................218
8.7 References.............................................................................................218
Exercises .........................................................................................................221
9 System on a Chip (SoC) Test........................................................................225
9.1 Introduction...........................................................................................225
9.2 Examples of SoC Devices.....................................................................228
9.3 Test Complexity and Additional Problems ...........................................228
9.4 P1500 Core Test Standard Development ..............................................229
9.5 Future Directions for SoC Test .............................................................230
9.6 Summary...............................................................................................231
9.7 References.............................................................................................232
10 Test Pattern Generation and Fault Simulation ..........................................235
10.1 Introduction...........................................................................................235
10.2 Test Pattern Generation.........................................................................238
10.3 Digital Fault Simulation ........................................................................240
10.4 Analogue Fault Simulation....................................................................243
10.5 Mixed-Signal Fault Simulation .............................................................247
10.6 Issues with Fault Simulation .................................................................248
10.7 Circuit vs Behavioural Level Fault Simulation .....................................249
10.8 Future Directions...................................................................................249
10.9 Summary ...............................................................................................250
10.10 References.............................................................................................250
Exercises .........................................................................................................253
11 Automatic Test Equipment (ATE) and Production Test ...........................257
11.1 Introduction...........................................................................................257
11.2 Production Test Flow ............................................................................258
11.3 ATE Systems ........................................................................................260
11.4 Future Directions for ATE Systems......................................................264
11.5 Summary...............................................................................................265
11.6 References.............................................................................................265
12 Test Economics..............................................................................................267
12.1 Introduction...........................................................................................267
12.2 Purpose of a Test Economics Model.....................................................269