TCA6416A: 低电压16位I2C/SMBus接口扩展器

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TCA6416A是一款由Texas Instruments (TI)生产的低电压16位I2C和SMBus I/O扩展器，专为各种嵌入式系统设计，提供了丰富的功能和灵活性。该器件具有以下主要特点： 1. **电压范围**：TCA6416A支持宽广的供电电压，工作在1.65V至5.5V的范围内，这意味着它可以在多种低电压应用环境中稳定运行。 2. **I/O接口**：它拥有5个5-VTolerant I/O端口，这些端口能够适应1.8V、2.5V、3.3V或5VPP的输入/输出电压，支持双向电压级转换，适用于不同设备间的通信需求。 3. **中断输出**：TCA6416A具有一个可编程的Active-Low中断输出（INT），允许外部设备通过检测INT引脚的低电平状态来触发事件。 4. **复位功能**：内置的Active-Low Reset Input (RESET) 可以用于系统复位，使得外部信号可以直接控制芯片的初始化过程。 5. **I2C支持**：该扩展器支持400kHz的快速I2C通信速率，兼容1.8V SCL和SDA信号，这对于连接具有不同电压标准的I2C设备非常有用。 6. **配置功能**：包括输入/输出配置寄存器，用户可以通过这些寄存器来设置和管理各个I/O端口的工作模式，实现灵活的接口配置。 7. **封装选项**：TCA6416A提供三种不同的封装形式——ZQSPACKAGE、RTWPACKAGE和PWPACKAGE，分别适合不同的电路布局和空间需求。 8. **接地策略**：特别指出的是，某些封装中的中心暴露垫（如RTWPACKAGE）如果被使用，必须仅作为第二接地点或保持电气隔离，以确保良好的信号完整性。 TCA6416A是一款功能强大且灵活的I/O扩展器，它在低电压环境下的高效通信和信号处理能力，加上中断和配置功能，使其成为构建复杂电子系统时的理想选择。在实际应用中，开发者可以根据具体项目需求，充分利用这些特性来扩展和管理系统的输入/输出资源。

SDA

SCL

S P

StartCondition

StopCondition

SDA

SCL

DataLine

Change

1 2 8 9

NACK

ACK

DataOutput

byTransmitter

DataOutput

byReceiver

SCL From

Master

Start

Condition

ClockPulsefor

Acknowledgment

TCA6416A

SCPS194 – MAY 2009 .......................................................................................................................................................................................................

www.ti.com

A Stop condition, a low-to-high transition on the SDA input/output while the SCL input is high, is sent by the

master (see Figure 1 ).

Any number of data bytes can be transferred from the transmitter to receiver between the Start and the Stop

conditions. Each byte of eight bits is followed by one ACK bit. The transmitter must release the SDA line before

the receiver can send an ACK bit. The device that acknowledges must pull down the SDA line during the ACK

clock pulse, so that the SDA line is stable low during the high pulse of the ACK-related clock period (see

Figure 3 ). When a slave receiver is addressed, it must generate an ACK after each byte is received. Similarly,

the master must generate an ACK after each byte that it receives from the slave transmitter. Setup and hold

times must be met to ensure proper operation.

A master receiver signals an end of data to the slave transmitter by not generating an acknowledge (NACK) after

the last byte has been clocked out of the slave. This is done by the master receiver by holding the SDA line high.

In this event, the transmitter must release the data line to enable the master to generate a Stop condition.

Figure 1. Definition of Start and Stop Conditions

Figure 2. Bit Transfer

Figure 3. Acknowledgment on the I

C Bus

Product Folder Link(s): TCA6416A

Device Address

Slave Address

0 0

R/W

Fixed

Programmable

Control Register and Command Byte

B2 B1

B0B5

TCA6416A

www.ti.com

....................................................................................................................................................................................................... SCPS194 – MAY 2009

Interface Definition

BIT

BYTE

7 (MSB) 6 5 4 3 2 1 0 (LSB)

C slave address L H L L L L ADDR R/ W

P07 P06 P05 P04 P03 P02 P01 P00

I/O data bus

P17 P16 P15 P14 P13 P12 P11 P10

The address of the TCA6416A is shown in Figure 4 .

Figure 4. TCA6416A Address

Address Reference

ADDR I

C BUS SLAVE ADDRESS

L 64 (decimal), 40 (hexadecimal)

H 66 (decimal), 42 (hexadecimal)

The last bit of the slave address defines the operation (read or write) to be performed. A high (1) selects a read

operation, while a low (0) selects a write operation.

Following the successful acknowledgment of the address byte, the bus master sends a command byte, which is

stored in the control register in the TCA6416A. Three bits of this data byte state the operation (read or write) and

the internal registers (input, output, polarity inversion, or configuration) that will be affected. This register can be

written or read through the I

C bus. The command byte is sent only during a write transmission.

Once a new command has been sent, the register that was addressed continues to be accessed by reads until a

new command byte has been sent.

Figure 5. Control Register Bits

Command Byte

CONTROL REGISTER BITS

COMMAND BYTE POWER-UP

(HEX) DEFAULT

B7 B6 B5 B4 B3 B2 B1 B0

0 0 0 0 0 0 0 0 00 Input Port 0 Read byte xxxx xxxx

(1)

0 0 0 0 0 0 0 1 01 Input Port 1 Read byte xxxx xxxx

0 0 0 0 0 0 1 0 02 Output Port 0 Read/write byte 1111 1111

0 0 0 0 0 0 1 1 03 Output Port 1 Read/write byte 1111 1111

0 0 0 0 0 1 0 0 04 Polarity Inversion Port 0 Read/write byte 0000 0000

0 0 0 0 0 1 0 1 05 Polarity Inversion Port 1 Read/write byte 0000 0000

0 0 0 0 0 1 1 0 06 Configuration Port 0 Read/write byte 1111 1111

0 0 0 0 0 1 1 1 07 Configuration Port 1 Read/write byte 1111 1111

(1) Undefined

Product Folder Link(s): TCA6416A

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TCA6416A: 低电压16位I2C/SMBus接口扩展器

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