TI TLV9001-Q1：1MHz汽车低功耗RRIO放大器

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7.5 Thermal Information for Dual Channel

THERMAL METRIC

(1)

TLV9002-Q1

UNITD (SOIC) DGK (VSSOP) PW (TSSOP)

8 PINS 8 PINS 8 PINS

θJA

Junction-to-ambient thermal resistance 151.9 196.6 TBD °C/W

θJC(top)

Junction-to-case (top) thermal resistance 92.0 86.2 TBD °C/W

θJB

Junction-to-board thermal resistance 95.4 118.3 TBD °C/W

Junction-to-top characterization parameter 40.2 23.2 TBD °C/W

Junction-to-board characterization parameter 94.7 116.7 TBD °C/W

(1) For more information about traditional and new thermalmetrics, see Semiconductor and ICPackage Thermal Metrics application report.

7.6 Thermal Information for Quad Channel

THERMAL METRIC

(1)

TLV9004-Q1

UNITD (SOIC) DYY (SOT-23) PW (TSSOP)

14 PINS 14 PINS 14 PINS

θJA

Junction-to-ambient thermal resistance 115.1 154.3 135.3 °C/W

θJC(top)

Junction-to-case (top) thermal resistance 71.2 86.8 63.5 °C/W

θJB

Junction-to-board thermal resistance 71.1 67.9 78.4 °C/W

Junction-to-top characterization parameter 29.6 10.1 13.6 °C/W

Junction-to-board characterization parameter 70.7 67.5 77.9 °C/W

(1) For more information about traditional and new thermalmetrics, see Semiconductor and ICPackage Thermal Metrics application report.

TLV9001-Q1, TLV9002-Q1, TLV9004-Q1

ZHCSJN6C – MAY 2019 – REVISED OCTOBER 2021

www.ti.com.cn

8 Submit Document Feedback

Product Folder Links: TLV9001-Q1 TLV9002-Q1 TLV9004-Q1

7.7 Electrical Characteristics

For V

= (V+) – (V–) = 1.8 V to 5.5 V (±0.9 V to ±2.75 V), T

= 25 °C, R

= 10 kΩ connected to V

/ 2, and V

= V

OUT

/ 2 (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

OFFSET VOLTAGE

Input offset voltage

Vs = 5 V ±0.4 ±1.85 mV

Vs = 5 V, T

= –40°C to 125°C

±2 mV

/dT V

vs temperature

= –40°C to 125°C

±0.6

μV/°C

PSRR Power-supply rejection ratio

= 1.8 to 5.5 V, V

= (V–)

80 105 dB

INPUT VOLTAGE RANGE

Common-mode voltage range No phase reversal, rail-to-rail input

(V–) – 0.1

(V+) + 0.1 V

CMRR Common-mode rejection ratio

= 1.8 V, (V–) – 0.1 V < V

< (V+) – 1.4 V,

= –40°C to 125°C

86 dB

= 5.5 V, (V–) – 0.1 V < V

< (V+) – 1.4 V,

= –40°C to 125°C

95 dB

= 5.5 V, (V–) – 0.1 V < V

< (V+) + 0.1 V,

= –40°C to 125°C

63 77 dB

= 1.8 V, (V–) – 0.1 V < V

< (V+)+ 0.1 V,

= –40°C to 125°C

68 dB

INPUT BIAS CURRENT

Input bias current Vs = 5 V ±5 pA

Input offset current ±2 pA

NOISE

Input voltage noise (peak-to-peak)

ƒ = 0.1 Hz to 10 Hz, Vs = 5 V

4.7

μV

Input voltage noise density

ƒ = 1 kHz, Vs = 5 V

nV/√Hz

ƒ = 10 kHz, Vs = 5 V

nV/√Hz

Input current noise density

ƒ = 1 kHz, Vs = 5 V

fA/√Hz

INPUT CAPACITANCE

Differential 1.5 pF

Common-mode 5 pF

OPEN-LOOP GAIN

Open-loop voltage gain

= 5.5 V, (V–) + 0.05 V < V

< (V+) – 0.05 V,

= 10 kΩ

104 117 dB

= 1.8 V, (V–) + 0.04 V < V

< (V+) – 0.04 V,

= 10 kΩ

100 dB

= 1.8 V, (V–) + 0.1 V < V

< (V+) – 0.1 V,

= 2 kΩ

115 dB

= 5.5 V, (V–) + 0.15 V < V

< (V+) – 0.15 V,

= 2 kΩ

130 dB

FREQUENCY RESPONSE

GBW Gain-bandwidth product Vs = 5 V 1 MHz

Phase margin V

= 5.5 V, G = 1 78 degrees

SR Slew rate Vs = 5 V 2 V/µs

Settling time

To 0.1%, V

= 5 V, 2 V Step , G = +1, C

= 100 pF 2.5

μs

To 0.01%, V

= 5 V, 2 V Step , G = +1, C

= 100 pF 3

μs

Overload recovery time V

= 5 V, V

× gain > V

0.85

μs

THD+N Total harmonic distortion + noise

= 5.5 V, V

= 2.5 V, V

= 1 V

RMS

, G = +1,

f = 1 kHz, 80 kHz measurement BW

0.004 %

OUTPUT

Voltage output swing from supply rails

= 5.5 V, R

= 10 kΩ

10 20 mV

= 5.5 V, R

= 2 kΩ

35 55 mV

Short-circuit current Vs = 5.5 V ±40 mA

www.ti.com.cn

TLV9001-Q1, TLV9002-Q1, TLV9004-Q1

ZHCSJN6C – MAY 2019 – REVISED OCTOBER 2021

Submit Document Feedback

Product Folder Links: TLV9001-Q1 TLV9002-Q1 TLV9004-Q1

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