NCT6779D IO芯片技术手册：主板监控与接口详解

NCT6779D

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"NCT6779D是Nuvoton公司设计的一款IO芯片，主要应用于电脑主板，如ASUS B75主板。该芯片能够提供对主板多种信息的监控和控制，包括温度、电压和风扇转速等。文档包含芯片的详细规格、功能介绍、接口定义以及引脚描述等内容，涵盖了LPC接口、并行端口、串行端口、键盘控制器接口、硬件监控接口等多个方面。" NCT6779D是一款由Nuvoton制造的集成电路，它主要用于计算机主板上的输入/输出（I/O）管理。该芯片在主板上扮演着重要的角色，因为它提供了对系统状态的全面监控，例如检测和报告温度、电压水平和风扇速度等关键硬件参数。这有助于预防过热和其他可能影响系统稳定性和寿命的问题。文档的结构包括多个部分，详细介绍了NCT6779D的各项功能和特性。"GENERALDESCRIPTION"章节对芯片的基本功能进行了概述，而"FEATURES"部分列出了其主要特点。"BLOCKDIAGRAM"则通过图形方式展示了芯片内部的模块布局，帮助用户理解其工作原理。在"PINLAYOUT"和"PINDESCRIPTION"章节中，详细列出了芯片的所有引脚及其用途。其中，LPC（Low Pin Count）接口用于与主板的其它组件通信，提供了一个低引脚数的连接方案。"MULTI-MODEPARALLELPORT"允许该芯片支持多种并行端口模式，适应不同的应用需求。"SERIALPORTINTERFACE"则涉及串行通信功能，包括与外部设备的串行数据交换。 "KBCINTERFACE"是键盘控制器接口，使得芯片能够处理键盘和鼠标的输入信号。"CIRINTERFACE"可能是指消费红外接口，可用于遥控设备的控制。"HARDWAREMONITORINTERFACE"是硬件监控接口，用于读取和控制系统的环境条件。"INTEL®PECIINTERFACE"则是Intel平台能量计算接口，用于更高级的能量管理和监控。此外，"ADVANCEDCONFIGURATION&POWERINTERFACE"（ACPI）和"ADVANCEDSLEEPSTATECONTROLCONTROL"允许芯片参与系统的电源管理和睡眠状态控制。"PORT80MESSAGEDISPLAY&LEDCONTROL"则涉及故障诊断信息显示和LED控制。"SMBUSINTERFACE"是系统管理总线接口，用于连接传感器和其他管理设备。文档还讨论了电源引脚、AMD平台的相关接口，如"AMDPOWER-ONSEQUENCE"和"AMDSB-TSIINTERFACE"，以及双电压控制功能。"DUALVOLTAGECONTROL"可能允许芯片同时管理两种不同电压等级。"GPIO"（通用输入/输出）接口提供了灵活的数字信号控制，分为多个子接口，每个子接口都详细描述了其功能和操作方式。最后，文档还提到了"STRAPPINGPINS"（配置引脚）和内部的上拉、下拉电阻设置，这些都对于芯片在不同主板上的正确配置至关重要。这些详细的信息对于主板设计师和系统工程师来说是非常宝贵的资源，他们可以借此确保NCT6779D能有效集成到他们的系统设计中，实现高效且可靠的硬件监控和控制。

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NCT6779D

Publication Release Date: March 29, 2012

-XV- version: 1.0

LIST OF FIGURES

Figure 3-1 NCT6779D Block Diagram .............................................................................................. 5

Figure 4-1 NCT6779D Pin Layout

..................................................................................................... 6

Figure 6-1 RSMRST# and DPWROK#

........................................................................................... 28

Figure 6-2 P

WROK ......................................................................................................................... 29

Figure 6-3 RESETCONI# and

PWROK .......................................................................................... 29

Figure 6-4 RSTOUTX# and LRESET#

............................................................................................ 29

Figure 6-5 BKFD_CUT and LATCH_BK

FD_CUT........................................................................... 31

Figure 6-6 3V

SBSW# ...................................................................................................................... 32

Figure 6-7 PSON# Bloc

k Diagram .................................................................................................. 33

Figure 6-8 PWROK Block

Diagram................................................................................................. 34

Figure 6-9 Illustration of Dual Color LED appli

cation ...................................................................... 35

Figure 6-10 Illustration of LED polarity

............................................................................................ 37

Figure 6-11 ASSC Applic

ation Diagram.......................................................................................... 40

Figure 7-1 Structure of the Configuration Regis

ter ......................................................................... 47

Figure 7-2 Configuration Regis

ter ................................................................................................... 49

Figure 8-1 LPC Bus’ Reads from / Write to Internal Regis

ters ....................................................... 52

Figure 8-2 Serial Bus Write to Internal Address

Figure 8-3 Serial Bus Read from Internal Addres

s Register........................................................... 53

Figure 8-4 Analog Inputs and Application Circuit of the NCT6779D

............................................... 54

Figure 8-5 Monitoring Temperature from Thermis

tor...................................................................... 56

Figure 8-6 Monitoring Temperature from Thermal Diode (Voltage Mode)

...................................... 57

Figure 8-7 Monitoring Temperature from Thermal Diode (Current Mode)

...................................... 57

Figure 8-8 PECI Temperature

......................................................................................................... 58

Figure 8-9 Temperature and Fan Speed Relation after Tbas

e Offsets .......................................... 59

Figure 8-10 SMART FAN

Function Block Diagram ..................................................................... 63

Figure 8-11 Thermal Cruise

Mode Parameters Figure................................................................ 64

Figure 8-12 Mechanism of Thermal Cruise

Mode (PWN Duty Cycle)......................................... 64

Figure 8-13 Mechanism of Thermal Cruise

Mode (DC Output Voltage) ..................................... 65

Figure 8-14 Mechanism of Fan Speed Cruise

Mode................................................................... 65

Figure 8-15 SMART FAN

IV & Close Loop Fan Control Mechanism .......................................... 68

Figure 8-16 Fan Control Duty Mode Programmi

ng Flow ................................................................ 70

Figure 8-17 Close-Loop Fan Control RP

M mode Programming Flow ............................................ 71

Figure 8-18 CPUFAN SMART FAN

IV Table Parameters Figure ............................................... 72

Figure 8-19 Fanout Step Relation of CPUFANOUT

....................................................................... 72

Figure 8-20 SYS TEMP and Weight Value Rel

ations ..................................................................... 73

Figure 8-21 Fan Control Weighting

Duty Mode Programming Flow ............................................... 74

Figure 8-22 SMI Mode of Voltage and Fan Inputs

.......................................................................... 75

Figure 8-23 Shut-down Interrupt Mode

........................................................................................... 76

Figure 8-24 SMI Mode of SYSTIN I

................................................................................................ 77

Figure 8-25 SMI Mode of SYSTIN II

............................................................................................... 77

Figure 8-26 Shut-down Interrupt Mode

........................................................................................... 78

Figure 8-27 SMI Mode of CPUTIN

.................................................................................................. 79

NCT6779D

Publication Release Date: March 29, 2012

-XVI- version: 1.0

Figure 8-28 OVT# Modes of Temperature Input

s ........................................................................... 80

Figure 8-29 Caseopen Mechani

sm ................................................................................................. 81

Figure 8-30 Power measurement arc

hitecture................................................................................ 82

Figure 12-1 Keyboard and Mouse Interface.................................................................................. 236

Figure 15-1 Power Control Mec

hanism......................................................................................... 257

Figure 15-2 Power Sequence from S5 to S0, then Back to S5

..................................................... 258

Figure 15-3 The previous

state is “on” .......................................................................................... 259

Figure 15-4 The previous

state is “off”. ......................................................................................... 259

Figure 15-5 Mechanism of Resume Reset Logic

.......................................................................... 261

Figure 16-1 Start Frame Timing with Source Sampled A Low Pulse on IRQ1

............................. 262

Figure 16-2 Stop Frame Timing with Host Us

ing 17 SERIRQ Sampling Period........................... 264

Figure 19-1 Data Trans

fer Format ................................................................................................ 273

Figure 19-2 SMBus Arbit

ration...................................................................................................... 274

Figure 19-3 Clock sync

hronization................................................................................................ 274

Figure 19-4 SMBus Master Bloc

k Diagram................................................................................... 276

Figure 19-5 Programming Flow

..................................................................................................... 277

Figure 19-6 TSI Routine

................................................................................................................ 278

Figure 19-7 PCH Routine

.............................................................................................................. 278

Figure 19-8 PCH Routine

.............................................................................................................. 279

Figure 19-9 Manual Mode Programming Flow

.............................................................................. 280

Figure 20-1 PORT80 to UART Block

Diagram.............................................................................. 290

NCT6779D

Publication Release Date: March 29, 2012

-XVII- version: 1.0

LIST OF TABLES

Table 6-1 Pin Description ................................................................................................................ 28

Table 7-1 Devices of I/O Bas

e Address .......................................................................................... 48

Table 8-1 Temperature Data Format

.............................................................................................. 56

Table 8-2 Relative Registers – at Thermal Cruis

eTM Mode........................................................... 66

Table 8-3 Relative Registers – at Speed

CruiseTM Mode.............................................................. 66

Table 8-4 Relative Register-at SMART FAN

IV Control Mode .................................................... 68

Table 8-5 Relative Register-at Weight Value Control

..................................................................... 73

Table 8-6 Relative Regis

ter of SMI functions.................................................................................. 79

Table 8-7 Relative Regis

ter of OVT functions................................................................................. 80

Table 10-1 Register Summary for UA

RT ...................................................................................... 217

Table 11-1 Pin Descriptions for SPP, EPP, and ECP Modes

....................................................... 224

Table 11-2 EPP Regis

ter Addresses ............................................................................................ 225

Table 11-3 Address and Bit Map for SPP and EPP Modes

.......................................................... 225

Table 11-4 ECP Mode Description

................................................................................................ 228

Table 11-5 ECP Regis

ter Addresses ............................................................................................ 229

Table 11-6 Bit Map of the ECP Regis

ters ..................................................................................... 229

Table 12-1 Bit Map of Stat

us Register .......................................................................................... 237

Table 12-2 KBC Command Sets

................................................................................................... 238

Table 13-1 CIR Regis

ter Table ..................................................................................................... 242

Table 15-1 Bit Map of Logical Device A, CR[E4h], Bits[6:5]

......................................................... 259

Table 15-2 Definitions of Mouse

Wake-Up Events ....................................................................... 261

Table 15-3 Timing and Voltage Paramet

ers of RSMRST# ........................................................... 261

Table 16-1 SERIRQ Sampling Periods

......................................................................................... 263

Table 18-1 Relative Control Registers of GPIO 41, 46, 31 and 3

2 that Support Wake-Up Function

....................................................................................................................................................... 266

Table 18-2 GPIO Group Programming T

able ............................................................................... 266

Table 18-3 GPIO Regis

ter Addresses........................................................................................... 272

Table 19-1 SB-TSI Address

Encoding .......................................................................................... 275

Table 19-2 PCH Command Summary

.......................................................................................... 275

Table 19-3 SMBus Master Bank

0 Registers ................................................................................ 281

NCT6779D

Publication Release Date: March 29, 2012

-1- Version: 1.0

1. GENERAL DESCRIPTION

The NCT6779D is a member of Nuvoton’s Super I/O product line. The NCT6779D monitors several critical

parameters in PC hardware, including power supply voltages, fan speeds, and temperatures. In terms of

temperature monitoring, the NCT6779D adopts the Current Mode (dual current source) and thermistor sensor

approach. The NCT6779D also supports the Smart Fan control system, including “S

MART FAN

I and SMART

IV, which makes the system more stable and user-friendly.

The NCT6779D provides two high-speed serial communication port (UART), which includes a 16-byte

send/receive FIFO, a programmable baud rate generator, complete modem-control capability, and a processor

interrupt system. The UART supports legacy speeds up to 115.2K bps as well as even higher baud rates of 230K,

460K, or 921K bps to support higher speed modems.

The NCT6779D supports the PC-compatible printer port (SPP), the bi-directional printer port (BPP), the enhanced

parallel port (EPP) and the extended capabilities port (ECP). The NCT6779D supports keyboard and mouse

interface which is 8042-based keyboard controller.

The NCT6779D provides flexible I/O control functions through a set of general purpose I/O (GPIO) ports. These

GPIO ports may serve as simple I/O ports or may be individually configured to provide alternative functions.

The NCT6779D supports the Intel

PECI (Platform Environment Control Interface) and AMD

SB-TSI interface.

The NCT6779D supports AMD

CPU power on sequence, and it also supports Intel

Deep Sleep Well glue logic

to help customers to reduce the external circuits needed while using Deep Sleep Well function.

The NCT6779D supports to decode port 80 diagnostic messages on the LPC bus. This could help on system

power on debugging. It also supports two-color LED control to indicate system power states. The NCT6779D

supports Consumer IR function for remote control purpose. It also supports Advanced Power Saving function to

further reduce the power consumption while the system is at S5 state.

The configuration registers inside the NCT6779D support mode selection, function enable and disable, and

power-down selection. Furthermore, the configurable PnP features are compatible with the plug-and-play feature

in Windows, making the allocation of the system resources more efficient than ever.

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