路由器的硬件设计原理图（绝密）_路由器电路图

路由器，AMD

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A A

B B

C C

D D

E E

Table of Contents

Page 1: Title Page

Page 2: Am186CC Processor

Page 5: ISDN S Interface

Page 6: ISDN U Interface

Page 7: POTS - RSLIC 1

Page 8: POTS - RSLIC 2

Page 9: POTS - DSLAC

Page 10: Clock/Configuration

Page 11: Power

Page 12: Serial/USB

Page 13: TIP/PIO

Page 4: System Memory

Page 3: Ethernet

Rev 1.0:

Original design

Schematics

Reference Design

Am186CC

ISDN Router

Page 14: MISC

Rev 1.1:

Updated design

Rev 2.0:

Updated design

Rev 2.1:

Updated design

COVER.SCH 2.1

Am186CC ISDN Router (Reference Design) - Cover Page

5204 E. Ben White Blvd.

Austin, TX 78741

114Tuesday, July 20, 1999

Design Name

Size Schematic Sheet Name Rev

Date: Sheet of

16x12.5

E E

D D

C C

B B

A A

121

1 120

160

8140

POTS RING 1

POTS RING 2

T7237 SCLK CTRL

LED ISDN B2

USB DETECT

USB VCC

REV 2.0

NOTE: Decoupling

capacitors each located

next to a VCC pin

NOTE: All Resistors are 5% 0603, and all capacitors are 10% 0603 unless otherwise noted.

REV 2.0

REV 2.1

Am186CC

- Am186CC Processor

PROCESSOR.SCH 2.1

Am186CC ISDN Router (Reference Design)

5204 E. Ben White Blvd.

Austin, TX 78741

214Tuesday, July 20, 1999

Design Name

Size Schematic Sheet Name Rev

Date: Sheet of

16x12.5

PIO36

INT4

INT3

INT2

D12

CLKOUT CLOCK2

PIO42

PIO37

INT0

UCLK CLOCK3

RTRHU#HSUART3

USBX2 CLOCK5

PIO38

PIO41

INT8

PIO40

PIO18

SDATASYNCPORT2

USB+USB1

PIO17

D14

VCC

PIO39

INT1

D13

VCCA

USB-USB0

INT6

D11

PIO43

FSCA

GCI3

SCLKSYNCPORT1

X1 CLOCK0

CLKA

GCI2

TXDHU#HSUART1

INT9

INT5

D15

SDENSYNCPORT0

X2 CLOCK1

D10

RXDHU#

HSUART0

INT7

USBX1 CLOCK4

CCAA0

CCAA1

CCAA2

CCAA3

CCAA4

CCAA5

CCAA6

CCAA7

CCAA8

CCAA9

CCAA10

CCAA11

CCAA12

CCAA13

CCAA14

CCAA15

CCAA16

CCAA17

CCAA18

CCAA19

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

PCS1#CNTL13

PCS6#CNTL18

CCMC7

CCMC8

CAS1#CNTL9

PCS3#CNTL15

WLB#

CNTL22

DEN#CNTL26

HLDA CNTL2

RES#CNTL4

ALECNTL24

S2#CNTL30

HOLD CNTL3

MCS0#CNTL8

BHE#CNTL27

PCS0#CNTL12

S0#CNTL28

CCMC10

S1#CNTL29

PCS7#CNTL19

RD#

CNTL20

UCS#CNTL6

CAS0#CNTL10

RESOUTCNTL5

CCMC9

MCS3#

CNTL11

DT/R#CNTL25

CCMC6

ARDY CNTL0

SRDY CNTL1

PCS4#CNTL16

PCS2#CNTL14

PCS5#CNTL17

WR#

CNTL21

RAS0#CNTL7

CCMC20

CCMC21

CCMC22

WHB#

CNTL23

VCC

DDA

GCI0

HSUART3

HSUART2

VCC

VCCA

VCC3

R107 56

C123

0.1uF

C122

0.1uF

C127

0.1uF

C126

0.1uF

C125

0.1uF

C124

0.1uF

C131

0.1uF

C130

0.1uF

C129

0.1uF

C128

0.1uF

C135

0.1uF

C134

0.1uF

C133

0.1uF

C132

0.1uF

C136

0.1uF

R108 56

R120 56

R119 56

R118 56

R117 56

R116 56

R115 56

R114 56

R113 56

R132 56

R131 56

R129 56

R127 56

R125 56

R123 56

R122 56

R121 56

R135 56

R134 56

R133 56

C56

0.01uF

C55

0.001uF

C61

0.1uF

C60

0.01uF

C59

0.001uF

C57

0.1uF

C58

4.7uF

16V

C-CASE

C54

10uF

16V

C-CASE

FB2

MURATA BLM31P500SPB

FB1

MURATA BLM31P500SPB

R109 56

R124 33

R110 56

R126 56

R112 56

R128 33

R111 56

AM186CC

100

108

121

130

140

155

105

107

109

110

111

112

113

115

124

145

146

147

114

116

117

118

119

122

123

134

135

136

137

138

139

149

150

151

152

153

154

156

157

158

15914

141

142

143

144

126

127

128

129

131

132

101

102

103

104

106

120

125

133

148

160

VSS

VSSA

VSS

VSSUSB

VSS

UCLK [USBSOF] [USBSCI] [PIO21]

CLKOUT

USBX1

USBX2

VCC

VCCA

VCC

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

AD0

AD8

AD1

AD9

AD2

AD10

AD3

AD11

AD4

AD12

AD5

AD13

AD6

AD14

AD7

AD15

DRQ1

INT0

INT1

INT2

INT3

INT4

INT5

NMI

DRQ0 [PIO9]

INT6 [PIO19]

INT7 [PIO7]

INT8 [PWD] [PIO6]

SDEN [PIO10]

SCLK [PIO11]

SDATA [PIO12]

S2#

S1#

S0# {USBXCVR#}

RESOUT

QS0

QS1

BSIZE8#

RES#

TCLKA [FSCA] [FSCA]

RCLKA [DCLA] [CLKA]

RXDA [DDA] [RXDA]

TXDA [DUA] [TXDA]

RTRA# [PIO18]

CTSA# [TSCA#] [PIO17]

TCLKB [FSCB] [PIO41]

RCLKB [CLKB] [PIO40]

RTRB# [PIO39]

CTSB# [TSCB#] [PIO38]

RXDB [RXDB] [PIO36]

TXDB [TXDB] [PIO37]

TCLKC [FSCC] [PIO23]

RCLKC [CLKC] [PIO22]

RTRC# [PIO45]

CTSC# [TSCC#] [PIO44]

RXDC [RXDC] [PIO42]

TXDC [TXDC] [PIO43]

RTRU# [RCLKD] [CLKD] [PIO25]

CTSU# [TCLKD] [FSCD] [PIO24]

RXDU [RXDD] [RXDD] [PIO26]

TXDU [TXDD] [TXDD] [PIO20]ARDY [PIO8]

SRDY [PIO35]

HLDA {CLKSEL1}

HOLD

TMROUT0 [PIO28]

TMRIN0 [PIO27]

TMROUT1 [PIO1]

TMRIN1 [PIO0]

MCS0# {UCSX8#} [PIO4]

MCS1# [CAS1#]

MCS2# [CAS0#]

MCS3# [RAS1#] [PIO5]

LCS# [RAS0#]

UCS# {ONCE#}

PCS0# {USBSEL1} [PIO13]

PCS1# {USBSEL2} [PIO14]

PCS2#

PCS3#

PCS4# {CLKSEL2} [PIO3]

PCS5# {TESTMODE#} [PIO2]

PCS6# [PIO32]

PCS7# [PIO31]

WR# {PRODTST#} [PIO15]

WHB#

WLB#

RD#

DT/R# [PIO29]

DEN# [DS#] [PIO30]

ALE [PIO33]

BHE# {ADEN#} [PIO34]

RSRVD4 [UTXDPLS]

RSRVD3 [UTXDMNS]

RSRVD2 [UXVEN#]

RSRVD1 [UXVRCV]

USBD- [UDMNS]

USBD+ [UDPLS]

RTRHU# [RTRD#] [PIO47]

CTSHU# [CTSD#] [TSCD#] PIO46]

RXDHU [PIO16]

TXDHU

VCC

VCCUSB

R171

R172

A[19..0]

D[15..0]

INT[9..0]

CLOCK[5..0]

CNTL[30..0]

SYNCPORT[2..0]

USB[1..0]

HSUART[3..0]

CNTL[30..0]

GCI[3..0]

PIO[43..36]

PIO1

PIO[18..17]

CCTXDA

CCTXDD

CCTRL1

GCI1

PIO0

PIO28

PIO27

GCI2

GCI3

E E

D D

C C

B B

A A

SOT-23 Top View

RJ45 Connector

Component Side View

Mounting Hole Layout

Front View

618325

LED

NOTE: Connect between

AVSS1 (Pin 100) and

AVDD3 (Pin 96)

Board Edge

PINS: 1-8

NP MOUNTING HOLES: 9, 10

SHIELD MOUNTING HOLES:

11, 12

Layout Note:

Keepout Area, No Power or GND planes

Signal Trace = 20 mils, route all traces

on top signal layer

Inputs/Outputs from PAL16V8

A0 - Used to generate CE# to low byte of SRAM

MEMW# - Write pulse to SRAM, high and low bytes

MASTER# - Used to tri-state A0 and MEMW#

HLDA - Inverted from 186CC to PCNetISA

Bus Arbitration Logic

Chip Select Logic

for PCNetISA

ETHERNET1.SCH 2.1

Am186CC ISDN Router (Reference Design) - PCNetISA

5204 E. Ben White Blvd.

Austin, TX 78741

314Tuesday, July 20, 1999

Design Name

Size Schematic Sheet Name Rev

Date: Sheet of

16x12.5

RESOUT

CNTL5

PCS2# CNTL14

A15

A14

A13

A12

A11

A10

D13

D15

D11

D14

D12

D10

ENET11

DISHT

CISHT

HOLD

IOCHRDY

IOCS16#

SHFBUSY

CNTL27BHE#

RD#

CNTL20

WR#

CNTL21

RD#

CNTL20

CNTL21

WR#

REF#

SLEEP#

A16

A17

A18

A19

DACK

ENETX2

ENETX1

ENETLED1

ENETLED2

ENETLED3

ENETLEDX1

ENETLEDX2

ENETLEDX3

DACK

BHE#

REF#

SLEEP#

SHFBUSY

RD#

WR#

HOLD

EECS

EEDO

EEDI

EESK

VSSAE

BHLDA#

RXDP

TDM

RXDM

TXDM

TXPDP

RDM

TXPDM RDP

TXDP

TDP

HLDA BHLDA#

BHLDA#_5V

VCC5 VCCAE

VCC5

VCCAE

VCC5 VCC5

VCC5

R151

10K

U3F

74ACT04

13 12

U47A

74ACT08

U48A

74ACT125

2 3

20.000MHz

Ecliptek EC-20.000M-ITR

1 2

R162 0

LAN TRANSFORMER

TDX-

TDX+

TXP-

TXP+

RXD-

RXD+

TD+

TD-

RD+

RD-

Am79C961A

109

126

114

113

111

110

107

106

105

104

102

101

125

127

122

123

124

121

119

118

117

116

129

130

128

131

120

112

100

115

132

103

108

XTAL1

XTAL2

RESET

AEN

BALE

SBHE#

IOR#

IOW#

MEMR#

MEMW#

REF#

SLEEP#

DACK3#

DACK5#

DACK6#

DACK7#

SA0

SA1

SA2

SA3

SA4

SA5

SA6

SA7

SA8

SA9

SA10

SA11

SA12

SA13

SA14

SA15

SA16

SA17

SA18

SA19

LA17

LA18

LA19

LA20

LA21

LA22

LA23

SD0

SD1

SD2

SD3

SD4

SD5

SD6

SD7

SD8

SD9

SD10

SD11

SD12

SD13

SD14

SD15

IRQ3#

IRQ4#

IRQ5#

IRQ9#

IRQ10#

IRQ11#

IRQ12#

IRQ15/APCS#

IOCS16#

IOCHRDY

MASTER#

DRQ3

DRQ5

DRQ6

DRQ7

DXCVR

BPCS#

LED0

LED1

LED2

LED3

CI+

CI-

DI+

DI-

DO+

DO-

TXD-

TXD+

TXPD-

TXPD+

RXD-

RXD+

SHFBUSY

EECS

EEDO

EEDI

EESK

PRDB3

PRDB4

PRDB5

PRDB6

PRDB7

TDO

TMS

TDI

TCK

DVSS

AVSS1

AVSS2

DVDD

AVDD1

AVDD2

AVDD3

AVDD4

27pF

C10

0.1uF

22uF

16V

C-CASE

22uF

16V

C-CASE

0.1uF

C11

0.1uF

CR1

LED SOT-23

CATH

GREEN

RED

CR3

LED SOT-23

CATH

GREEN

RED

CR2

LED SOT-23

CATH

GREEN

RED

270

10K

270

10K

R12 10K

R11 10K

R10 10K

R9 10K

R16 10K

R15 10K

R14 10K

R13 10K

RJ45A

GND1

GND2

SERIAL EPROM DIP

VCC

VSS

R17

100K

CNTL[30..0]

A[19..0]

D[15..0]

CNTL3

MASTER#

INT3

CNTL27

CNTL20

CNTL21

CNTL2

MASTER#

SRAM_CE#

MASTER#

剩余13页未读，继续阅读

zllfm

2013-02-12

还不错，就是不太会，谢谢分享

shinore

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