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Copyright © 2011, 2012 ARM. All rights reserved.
ARM DEN0013C (ID071612)
Cortex
™
-A Series
Version: 3.0
Programmer’s Guide
ARM DEN0013C Copyright © 2011, 2012 ARM. All rights reserved. ii
ID071612 Non-Confidential
Cortex-A Series
Programmer’s Guide
Copyright © 2011, 2012 ARM. All rights reserved.
Release Information
The following changes have been made to this book.
Proprietary Notice
This Cortex-A Series Programmer’s Guide is protected by copyright and the practice or implementation of the
information herein may be protected by one or more patents or pending applications. No part of this Cortex-A Series
Programmer’s Guide may be reproduced in any form by any means without the express prior written permission of
ARM. No license, express or implied, by estoppel or otherwise to any intellectual property rights is granted by
this Cortex-A Series Programmer’s Guide.
Your access to the information in this Cortex-A Series Programmer’s Guide is conditional upon your acceptance that
you will not use or permit others to use the information for the purposes of determining whether implementations of the
information herein infringe any third party patents.
This Cortex-A Series Programmer’s Guide is provided “as is”. ARM makes no representations or warranties, either
express or implied, included but not limited to, warranties of merchantability, fitness for a particular purpose, or
non-infringement, that the content of this Cortex-A Series Programmer’s Guide is suitable for any particular purpose or
that any practice or implementation of the contents of the Cortex-A Series Programmer’s Guide will not infringe any
third party patents, copyrights, trade secrets, or other rights.
This Cortex-A Series Programmer’s Guide may include technical inaccuracies or typographical errors.
To the extent not prohibited by law, in no event will ARM be liable for any damages, including without limitation any
direct loss, lost revenue, lost profits or data, special, indirect, consequential, incidental or punitive damages, however
caused and regardless of the theory of liability, arising out of or related to any furnishing, practicing, modifying or any
use of this Programmer’s Guide, even if ARM has been advised of the possibility of such damages. The information
provided herein is subject to U.S. export control laws, including the U.S. Export Administration Act and its associated
regulations, and may be subject to export or import regulations in other countries. You agree to comply fully with all
laws and regulations of the United States and other countries (“Export Laws”) to assure that neither the information
herein, nor any direct products thereof are; (i) exported, directly or indirectly, in violation of Export Laws, either to any
countries that are subject to U.S. export restrictions or to any end user who has been prohibited from participating in the
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prohibited by Export Laws, including, without limitation, nuclear, chemical, or biological weapons proliferation.
Words and logos marked with
®
or
™
are registered trademarks or trademarks of ARM Limited, except as otherwise
stated below in this proprietary notice. Other brands and names mentioned herein may be the trademarks of their
respective owners.
Copyright © 2011, 2012 ARM Limited, 110 Fulbourn Road Cambridge, CB1 9NJ, England
This document is Non-Confidential but any disclosure by you is subject to you providing notice to and the
acceptance by the recipient of, the conditions set out above.
In this document, where the term ARM is used to refer to the company it means “ARM or any of its subsidiaries as
appropriate”.
Web Address
http://www.arm.com
Change history
Date Issue Confidentiality Change
25 March 2011 A Non-Confidential First release
10 August 2011 B Non-Confidential Second release. Virtualization chapter added. Updated to include
Cortex-A15 processor, and LPAE. Corrected and revised throughout
25 June 2012 C Non-Confidential Updated for third release. Updated to include Cortex-A7 processor, and
big.LITTLE. Index added. Corrected and revised throughout.
ARM DEN0013C Copyright © 2011, 2012 ARM. All rights reserved. iii
ID071612 Non-Confidential
Contents
Cortex-A Series Programmer’s Guide
Preface
References ....................................................................................................................... x
Typographical conventions .............................................................................................. xi
Feedback on this book .................................................................................................... xii
Glossary ......................................................................................................................... xiii
Chapter 1 Introduction
1.1 History ........................................................................................................................... 1-2
1.2 System-on-Chip (SoC) .................................................................................................. 1-3
1.3 Embedded systems ...................................................................................................... 1-4
Chapter 2 ARM Architecture and Processors
2.1 Architecture versions .................................................................................................... 2-3
2.2 Architecture history and extensions .............................................................................. 2-4
2.3 Key architectural points of ARM Cortex-A series processors ....................................... 2-8
2.4 Processors and pipelines .............................................................................................. 2-9
2.5 The Cortex-A series processors ................................................................................. 2-11
Chapter 3 Tools, Operating Systems and Boards
3.1 Linux distributions ......................................................................................................... 3-2
3.2 Useful tools ................................................................................................................... 3-6
3.3 Software toolchains for ARM processors ...................................................................... 3-8
3.4 ARM DS-5 ................................................................................................................... 3-11
3.5 Example platforms ...................................................................................................... 3-13
Chapter 4 ARM Registers, Modes and Instruction Sets
4.1 Instruction sets .............................................................................................................. 4-2
4.2 Modes ........................................................................................................................... 4-3
Contents
ARM DEN0013C Copyright © 2011, 2012 ARM. All rights reserved. iv
ID071612 Non-Confidential
4.3 Registers ....................................................................................................................... 4-4
4.4 Instruction pipelines ...................................................................................................... 4-7
4.5 Branch prediction ........................................................................................................ 4-10
Chapter 5 Introduction to Assembly Language
5.1 Comparison with other assembly languages ................................................................ 5-2
5.2 Instruction sets .............................................................................................................. 5-4
5.3 Introduction to the GNU Assembler .............................................................................. 5-5
5.4 ARM tools assembly language ..................................................................................... 5-9
5.5 Interworking ................................................................................................................ 5-11
5.6 Identifying assembly code .......................................................................................... 5-12
Chapter 6 ARM/Thumb Unified Assembly Language Instructions
6.1 Instruction set basics .................................................................................................... 6-2
6.2 Data processing operations .......................................................................................... 6-6
6.3 Multiplication operations ............................................................................................... 6-9
6.4 Memory instructions .................................................................................................... 6-10
6.5 Branches ..................................................................................................................... 6-13
6.6 Integer SIMD instructions ........................................................................................... 6-14
6.7 Saturating arithmetic ................................................................................................... 6-18
6.8 Miscellaneous instructions .......................................................................................... 6-19
Chapter 7 Floating-Point
7.1 Floating-point basics and the IEEE-754 standard ........................................................ 7-2
7.2 VFP support in GCC ..................................................................................................... 7-8
7.3 VFP support in the ARM Compiler ................................................................................ 7-9
7.4 VFP support in Linux .................................................................................................. 7-10
7.5 Floating-point optimization .......................................................................................... 7-11
Chapter 8 Introducing NEON
8.1 SIMD ............................................................................................................................. 8-2
8.2 NEON architecture overview ........................................................................................ 8-4
Chapter 9 Caches
9.1 Why do caches help? ................................................................................................... 9-3
9.2 Cache drawbacks ......................................................................................................... 9-4
9.3 Memory hierarchy ......................................................................................................... 9-5
9.4 Cache architecture ........................................................................................................ 9-6
9.5 Cache policies ............................................................................................................ 9-12
9.6 Write and Fetch buffers .............................................................................................. 9-14
9.7 Cache performance and hit rate ................................................................................. 9-15
9.8 Invalidating and cleaning cache memory .................................................................... 9-16
9.9 Point of coherency and unification .............................................................................. 9-17
9.10 Level 2 cache controller .............................................................................................. 9-18
9.11 Parity and ECC in caches ........................................................................................... 9-19
Chapter 10 Memory Management Unit
10.1 Virtual memory ............................................................................................................ 10-3
10.2 Level 1 page tables ..................................................................................................... 10-4
10.3 Level 2 page tables ..................................................................................................... 10-7
10.4 The Translation Lookaside Buffer ............................................................................. 10-10
10.5 TLB coherency .......................................................................................................... 10-11
10.6 Choice of page sizes ................................................................................................ 10-12
10.7 Memory attributes ..................................................................................................... 10-13
10.8 Multi-tasking and OS usage of page tables .............................................................. 10-16
10.9 Large Physical Address Extensions ......................................................................... 10-19
Contents
ARM DEN0013C Copyright © 2011, 2012 ARM. All rights reserved. v
ID071612 Non-Confidential
Chapter 11 Memory Ordering
11.1 ARM memory ordering model ..................................................................................... 11-4
11.2 Memory barriers .......................................................................................................... 11-7
11.3 Cache coherency implications .................................................................................. 11-12
Chapter 12 Exception Handling
12.1 Types of exception ...................................................................................................... 12-3
12.2 Exception mode summary .......................................................................................... 12-5
12.3 Entering an exception handler .................................................................................... 12-7
12.4 Exit from an exception handler ................................................................................... 12-8
12.5 Vector table ................................................................................................................. 12-9
12.6 Return instruction ...................................................................................................... 12-10
Chapter 13 Interrupt Handling
13.1 External interrupt requests .......................................................................................... 13-2
13.2 Generic Interrupt Controller ........................................................................................ 13-4
Chapter 14 Other Exception Handlers
14.1 Abort handler .............................................................................................................. 14-2
14.2 Undefined instruction handling ................................................................................... 14-3
14.3 SVC exception handling ............................................................................................. 14-4
14.4 Linux exception program flow ..................................................................................... 14-5
Chapter 15 Boot Code
15.1 Booting a bare-metal system ...................................................................................... 15-2
15.2 Configuration .............................................................................................................. 15-6
15.3 Booting Linux .............................................................................................................. 15-7
Chapter 16 Porting
16.1 Endianness ................................................................................................................. 16-2
16.2 Alignment .................................................................................................................... 16-5
16.3 Miscellaneous C porting issues .................................................................................. 16-7
16.4 Porting ARM assembly code to ARMv7 .................................................................... 16-10
16.5 Porting ARM code to Thumb .................................................................................... 16-11
Chapter 17 Application Binary Interfaces
17.1 Procedure Call Standard ............................................................................................ 17-2
17.2 Mixing C and assembly code ...................................................................................... 17-7
Chapter 18 Profiling
18.1 Profiler output ............................................................................................................. 18-3
Chapter 19 Optimizing Code to Run on ARM Processors
19.1 Compiler optimizations ............................................................................................... 19-3
19.2 ARM memory system optimization ............................................................................. 19-8
19.3 Source code modifications ........................................................................................ 19-13
Chapter 20 Writing NEON Code
20.1 NEON C Compiler and assembler .............................................................................. 20-2
20.2 Optimizing NEON assembler code ............................................................................. 20-7
20.3 NEON power saving ................................................................................................... 20-9
Chapter 21 Introduction to Multi-processing
21.1 Multi-processing ARM systems .................................................................................. 21-3
21.2 Symmetric multi-processing ........................................................................................ 21-5
21.3 Asymmetric multi-processing ...................................................................................... 21-7
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