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Rev. 0| Page 1 of 46
ADV7513
Low-Power HDMI 1.4a Transmitter
HARDWARE USER’S
GUIDE
- Revision 0 –
November 2011
ADV7513 HARDWARE USER’S GUIDE
Rev.0
Rev. 0 | Page 2 of 46
REVISION HISTORY
11/11 Rev 0 Initial Release
Legal Terms and Conditions
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks
are the property of their respective owners. Information contained within this document is subject to change without notice.
Software or hardware provided by Analog Devices may not be disassembled, decompiled or reverse engineered. Analog Devices’
standard terms and conditions for products purchased from Analog Devices can be found at:
http://www.analog.com/en/content/analog_devices_terms_and_conditions/fca.html
.
ADV7513 ADI Confidential HARDWARE USER’S GUIDE
Rev. 0
Rev. 0| Page 3 of 46
TABLE OF CONTENTS
Section 1: Introduction ......................................................................................................................................................................................... 7
1.1 Scope and Organization ....................................................................................................................................................................... 7
1.1.1 Links ................................................................................................................................................................................................ 7
1.1.2 Symbols ........................................................................................................................................................................................... 7
1.1.3 Format Standards ........................................................................................................................................................................... 7
1.2 Overview ................................................................................................................................................................................................ 8
1.3 Hardware Features ................................................................................................................................................................................ 8
1.4 Supported Input Formats .................................................................................................................................................................... 8
1.5 Supported Output Formats ................................................................................................................................................................. 8
Section 2: Reference Documents ......................................................................................................................................................................... 9
2.1 ADI Documents .................................................................................................................................................................................... 9
2.2 Industry Specifications ......................................................................................................................................................................... 9
Section 3: Block diagram .................................................................................................................................................................................... 10
Section 4: Specifications...................................................................................................................................................................................... 11
4.1 Explanation of Test Levels ................................................................................................................................................................. 15
4.2 ESD Caution ........................................................................................................................................................................................ 15
Section 5: Pin and package information ........................................................................................................................................................... 16
5.1 Mechanical Drawings and Outline Dimensions ............................................................................................................................ 19
Section 6: Functional Description ..................................................................................................................................................................... 20
6.1 Input Connections .............................................................................................................................................................................. 20
6.1.1 Unused Inputs .............................................................................................................................................................................. 20
6.1.2 Video Data Capture Block .......................................................................................................................................................... 20
6.1.2.1 Video Input Connections ................................................................................................................................................... 20
6.1.3 Audio Data Capture Block ......................................................................................................................................................... 26
6.1.3.1 Supported Audio Input Format and Implementation .................................................................................................... 26
6.1.3.2 Inter-IC Sound (I2S) Audio ............................................................................................................................................... 28
6.1.3.3 Sony/Philips Digital Interface (S/PDIF) ........................................................................................................................... 30
6.1.3.4 HBR Audio............................................................................................................................................................................ 30
6.1.4 Hot Plug Detect (HPD) pin ........................................................................................................................................................ 30
6.1.5 Power Down / I2C Address (PD/AD) ...................................................................................................................................... 30
6.1.6 Input Voltage Tolerance ............................................................................................................................................................. 31
6.2 Output Connections ........................................................................................................................................................................... 31
6.2.1 Output Formats Supported ........................................................................................................................................................ 31
6.2.2 TMDS Outputs ............................................................................................................................................................................. 31
6.2.2.1 ESD Protection ..................................................................................................................................................................... 31
6.2.2.2 EMI Prevention .................................................................................................................................................................... 31
6.2.3 Display Data Channel (DDC) pins ............................................................................................................................................ 31
6.2.4 Interrupt Output (INT) .............................................................................................................................................................. 32
6.2.5 PLL Circuit .................................................................................................................................................................................... 32
6.3 Consumer Electronic Control (CEC) .............................................................................................................................................. 32
6.3.1 Unused Inputs .............................................................................................................................................................................. 32
6.3.2 CEC Function ............................................................................................................................................................................... 32
6.4 Video Data Formatting ...................................................................................................................................................................... 33
6.4.1 Supported 3D Formats ................................................................................................................................................................ 33
6.4.2 DE, Hsync and Vsync Generation ............................................................................................................................................. 33
6.4.3 Color Space Conversion (CSC) Matrix..................................................................................................................................... 35
ADV7513 HARDWARE USER’S GUIDE
Rev.0
Rev. 0 | Page 4 of 46
6.4.4
4:2:2 to 4:4:4 and 4:4:4 to 4:2:2 Conversion Block ................................................................................................................... 36
6.5 DDC Controller .................................................................................................................................................................................. 36
6.6 Inter-IC Communications (I2C) ...................................................................................................................................................... 36
6.6.1 Two-Wire Serial Control Port ................................................................................................................................................... 36
6.6.2 Data Transfer via I2C .................................................................................................................................................................. 37
6.6.3 Serial Interface Read/Write Examples ...................................................................................................................................... 38
6.7 Power Domains ................................................................................................................................................................................... 39
6.7.1 Power Supply Sequencing .......................................................................................................................................................... 40
6.7.2 Power Consumption ................................................................................................................................................................... 40
Section 7: PCB Layout Recommendations ...................................................................................................................................................... 42
7.1 Power Supply filtering ........................................................................................................................................................................ 42
7.2 Video Clock and Data Inputs ............................................................................................................................................................ 43
7.3 Audio Clock and Data Inputs ........................................................................................................................................................... 43
7.4 SDA and SCL ....................................................................................................................................................................................... 43
7.5 DDCSDA and DDCSCL .................................................................................................................................................................... 43
7.6 Current Reference Pin: R_EXT ......................................................................................................................................................... 44
7.7 CEC Implementation ......................................................................................................................................................................... 44
Section 8: Glossary .............................................................................................................................................................................................. 46
ADV7513 ADI Confidential HARDWARE USER’S GUIDE
Rev. 0
Rev. 0| Page 5 of 46
TABLE OF FIGURES
Figure 1
ADV7513 Functional Block Diagram ........................................................................................................................................... 10
Figure 2 Timing for Video Data Interface ................................................................................................................................................... 13
Figure 3 Timing for I2S Audio Interface ..................................................................................................................................................... 13
Figure 4 Timing for S/PDIF Audio Interface .............................................................................................................................................. 14
Figure 5 64-lead LQFP configuration (top view - not to scale) ................................................................................................................ 16
Figure 6 64-lead Low-Profile Quad Flat Pack [LQFP-SW64-2] ............................................................................................................... 19
Figure 7 2X Clock timing ............................................................................................................................................................................... 23
Figure 8 DDR DE timing - Register 0x16[1] = 1......................................................................................................................................... 26
Figure 9 DDR DE timing - Register 0x16[1] = 0......................................................................................................................................... 26
Figure 10 I2S Standard Audio – Data width 16 to 24 bits per channel .................................................................................................. 28
Figure 11 I2S Standard Audio – 16-bit samples only ............................................................................................................................... 29
Figure 12 Serial Audio – Right-Justified .................................................................................................................................................... 29
Figure 13 Serial Audio – Left-Justified ....................................................................................................................................................... 29
Figure 14 AES3 Direct Audio ...................................................................................................................................................................... 30
Figure 15 S/PDIF Data Timing .................................................................................................................................................................... 30
Figure 16 Typical All-HDMI Home Theatre ............................................................................................................................................. 32
Figure 17 Sync Processing Block Diagram ................................................................................................................................................ 34
Figure 18 Single Channel of CSC (In_A) ................................................................................................................................................... 35
Figure 19 Serial Port Read/Write Timing .................................................................................................................................................. 38
Figure 20 Serial Interface—Typical Byte Transfer .................................................................................................................................... 39
Figure 21 Power Supply Domains ............................................................................................................................................................... 40
Figure 22 AVDD and PVDD Max Noise vs. Frequency .......................................................................................................................... 42
Figure 23 LC Filter Transfer Curve ............................................................................................................................................................ 43
Figure 24 CEC external connection ............................................................................................................................................................ 44
Figure 25 Example Schematic ...................................................................................................................................................................... 45
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