NVMe SSD介绍.pdf

Chapter 2

SSD Architecture and PCI Express Interface

K. Eshghi and R. Micheloni

Abstract Flash-memory-based solid-state disks (SSDs) provide faster random

access and data transfer rates than electromechanical drives and today can often

serve as rotating-disk replacements, but the host interface to SSDs remains a

performance bottleneck. PCI Express (PCIe)-based SSDs together with an emerging

Creativity is just connecting things. When you ask creative people how they did something,

they feel a little guilty because they didn’t really do it, they just saw something. It seemed

obvious to them after a while.

– Steve Jobs

Solid-state drives promise to greatly enhance enterprise storage performance. While

electromechanical disk drives have continuously ramped in capacity, the rotating-

storage technology doesn’t provide the access-time or transfer-rate performance

cessing, data mining, and cloud computing. Client applications are also in need of

© Springer ScienceCBusiness Media Dordrecht 2013

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an alternative to electromechanical disk drives that can deliver faster response times,

use less power, and fit in smaller mobile form factors.

Flash-memory-based Solid-State Disks (SSDs) can offer much faster random

access to data and faster transfer rates. Moreover, SSD capacity is now at the point

(PCIe)-based SSDs together with emerging host control interface standards address

(Sect. 2.4).

Several types of memory cards (CF, SD, MMC, :::) are available in the market

the target application: e.g. mobile phones need very small-sized removable media

like SD.

NANDs are usually available in TSOP packages.

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or a quartz can be used for a better clock precision. Of course, reasonable filter

memory is frequently used: during a write access, the cache is used for storing data

electrically altered but it is also preserved when the power supply is switched off.

NVM’s history began in the 1970s, with the introduction of the first EPROM

like mobile phones, USB keys, camcorders, and digital cameras. Solid State Disk

depending on how the memory cells are organized in the memory array, it is possible

to distinguish between NAND and NOR Flash memories. In this book we focus on

the second one is contacted to form the gate terminal. The isolated gate constitutes

operations performed to inject and remove electrons from the isolated gate are called

program and erase, respectively. These operations modify the threshold voltage V

voltage to cell’s terminals, it is then possible to discriminate two storage levels:

when the gate voltage is higher than the cell’s V

, the cell is on (“1”), otherwise it

is off (“0”).

It is worth mentioning that, due to floating gate scalability reasons, charge trap

memories are gaining more and more attention and they are described in Chap. 5,

together with their 3D evolution.

2.4 NAND Flash

to M

connected in series. Two selection transistors are placed at the edges of the string:

connects the string to the

bitline BL. The cell’s control gates are connected through the wordlines (WLs).

WL direction, adjacent NAND strings share the same WL, DSL, BSL and SL. In

a section of the NAND array along the bitline direction.

–BLOCK2ismadeupbyWL

Logical pages are made up of cells belonging to the same WL. The number of

on the number of storage levels, Flash memories are referred to in different ways:

• SLC memories stores 1 bit per cell;

• MLC memories stores 2 bits per cell;

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