![](https://csdnimg.cn/release/download_crawler_static/10351088/bgd.jpg)
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CMOS
H
:
::
:
Integrated VRM enable (Default)
L
:
::
:
Integrated VRM disable
INTVRMEN
*
(INTVRMEN should always be pull high.)
HDA AUDIO
This signal has a weak internal pull-down
On Die PLL VR Select is supplied by
1.5V when smapled high (Default)
1.8V when sampled low
Needs to be pulled High for Chief River platfrom
*
LOW= Disable (Default)
HIGH= Enable ( No Reboot )
*
*
Low = Disabled (Default)
High = Enabled
[Flash Descriptor Security Overide]
ODD
CAD note:
Place the resistor within 500 mils of the PCH. Avoid
routing next to clock pins.
SATA Impedance Compensation
W=20mils W=20mils
Place JUMPER under RAM door
<Intel update spec>
I
f RH1509 = stuff
RH1353 = @
QH10 = @
RH108 = @
SSD
HDD
INTEL HM86 design
PCH_TP25
+3.3V_ALW_PCH_JTAG PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TCK
PCH_RTCX1
PCH_RTCX2
PCH_RTCX2
PCH_RTCX1
PCH_RTCRST#
PCH_SRTCRST#
SM_INTRUDER#
PCH_INTVRMEN
PCH_INTVRMEN
SM_INTRUDER#
HDA_BIT_CLK
HDA_RST#
HDA_SDOUT
HDA_SYNC_R HDA_SYNC
HDA_BIT_CLK
HDA_SYNC
HDA_SYNC
HDA_SPKR
HDA_SPKR
HDA_RST#
HDA_SDIN0
HDA_SDOUT
HDA_SDOUT
PCH_GPIO13
PCH_GPIO33
SATA_PRX_DTX_N2
SATA_PRX_DTX_P2
SATA_PTX_C_DRX_N2
SATA_PTX_C_DRX_P2
SATA_PTX_DRX_N2
SATA_PTX_DRX_P2
SATA_COMP
SATA_COMP
HDD_LED#
PCH_GPIO21
SATA_DET#
SATA_IREF
CRT_SWITCH_1 PCH_GPIO33PCH_GPIO33
ME_FLASH
SATA_PRX_DTX_N0
SATA_PRX_DTX_P0
SATA_PTX_C_DRX_P0
SATA_PTX_C_DRX_N0SATA_PTX_DRX_N0
SATA_PTX_DRX_P0
SATA_PRX_DTX_N1
SATA_PRX_DTX_P1
SATA_PTX_C_DRX_P1
SATA_PTX_C_DRX_N1SATA_PTX_DRX_N1
SATA_PTX_DRX_P1
HDA_RST_AUDIO#<45>
HDA_SYNC_AUDIO<45>
HDA_SDOUT_AUDIO<45>
HDA_BITCLK_AUDIO<45>
HDA_SPKR<45>
HDA_SDIN0<45>
SATA_PRX_DTX_P2 <44>
SATA_PRX_DTX_N2 <44>
SATA_PTX_C_DRX_N2 <44>
SATA_PTX_C_DRX_P2 <44>
HDD_LED# <52>
SATA_DET# <40>
CRT_SWITCH_1<37>
ME_FLASH<47>
SATA_PRX_DTX_N0 <40>
SATA_PRX_DTX_P0 <40>
SATA_PTX_C_DRX_N0 <40>
SATA_PTX_C_DRX_P0 <40>
SATA_PRX_DTX_N1 <44>
SATA_PRX_DTX_P1 <44>
SATA_PTX_C_DRX_N1 <44>
SATA_PTX_C_DRX_P1 <44>
+3V_PCH
+RTCVCC
+RTCVCC
+5VS +3V_PCH
+3VS
+3V_PCH
+3V_PCH
+1.5VS
+3VS
+3VS
+3VS
+1.5VS
+RTCBATT +RTCVCC
+3VS
Size Document Number Rev
Date: Sheet
of
Security Classification
LC Future Center Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Issued Date
Deciphered Date
Title
Y401 NM-A031
Y401 NM-A031Y401 NM-A031
Y401 NM-A031
1.0
PCH (1/9) SATA,HDA,SPI, LPC
Custom
13 69
Wednesday, March 27, 2013
2012/07/01
2014/07/01
Size Document Number Rev
Date: Sheet of
Security Classification
LC Future Center Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Issued Date
Deciphered Date
Title
Y401 NM-A031
Y401 NM-A031Y401 NM-A031
Y401 NM-A031
1.0
PCH (1/9) SATA,HDA,SPI, LPC
Custom
13 69
Wednesday, March 27, 2013
2012/07/01
2014/07/01
Size Document Number Rev
Date: Sheet of
Security Classification
LC Future Center Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF LC FUTURE CENTER. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY LC FUTURE CENTER NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF LC FUTURE CENTER.
Issued Date
Deciphered Date
Title
Y401 NM-A031
Y401 NM-A031Y401 NM-A031
Y401 NM-A031
1.0
PCH (1/9) SATA,HDA,SPI, LPC
Custom
13 69
Wednesday, March 27, 2013
2012/07/01
2014/07/01
G
D
S
QH10
BSS138_NL_SOT23-3
G
D
S
QH10
BSS138_NL_SOT23-3
2
13
CH202
1U_0603_10V4Z
CH202
1U_0603_10V4Z
1
2
RH118
33_0402_5%
RH118
33_0402_5%
1 2
RH148 20K_0402_5%RH148 20K_0402_5%
1 2
RH48
100_0402_1%
@
RH48
100_0402_1%
@
12
CH184 0.01U_0402_16V7KCH184 0.01U_0402_16V7K
12
RH114
33_0402_5%
RH114
33_0402_5%
1 2
RH47
100_0402_1%
@
RH47
100_0402_1%
@
12
RH107 1K_0402_1%@RH107 1K_0402_1%@
1 2
RH49
100_0402_1%
@
RH49
100_0402_1%
@
12
RH145
10M_0402_5%
RH145
10M_0402_5%
1 2
RH110 0_0402_5%RH110 0_0402_5%
1 2
RH109
R_short 0_0402_5%
RH109
R_short 0_0402_5%
1 2
RH120 10K_0402_5%RH120 10K_0402_5%
12
RH149 1M_0402_5%RH149 1M_0402_5%
1 2
RH150 330K_0402_5%RH150 330K_0402_5%
1 2
RH410_0402_5% RH410_0402_5%
12
RH288
0_0603_5%
@
RH288
0_0603_5%
@
12
RH1509
0_0402_5%
@
RH1509
0_0402_5%
@
1 2
CH186 0.01U_0402_16V7KCH186 0.01U_0402_16V7K
12
RH112
33_0402_5%
RH112
33_0402_5%
1 2
RH108 1K_0402_5%RH108 1K_0402_5%
12
JTAGRTC AZALIA
SATA
LPT_PCH_M_EDS
REV = 5
1 OF 11
UHA
LYNXPOINT_BGA695
JTAGRTC AZALIA
SATA
LPT_PCH_M_EDS
REV = 5
1 OF 11
UHA
LYNXPOINT_BGA695
TP20
AB6
TP25
F8
TP9
BA2
TP22
C26
RTCX1
B5
SATA_RXN_1
BC10
SATA_RXP_1
BE10
JTAG_TDI
AE2
JTAG_TDO
AD3
JTAG_TMS
AD1
JTAG_TCK
AB3
HDA_SDO
A24
HDA_SDI2
G22
HDA_SDI3
F22
HDA_SDI1
K22
HDA_SDI0
L22
RTCRST#
D9
INTRUDER#
A8
INTVRMEN
G10
SRTCRST#
B9
RTCX2
B4
SATA_IREF
BD4
SATA0GP/GPIO21
AT1
SATA1GP/GPIO19
AU2
SATALED#
AP3
SATA_RCOMP
AY5
SATA_TXP5/PETP2
AR15
SATA_RXP5/PERP2
BE14
SATA_TXN5/PETN2
AP15
SATA_RXN5/PERN2
BC14
SATA_TXP4/PETP1
AW15
SATA_TXN4/PETN1
AV15
SATA_RXP4/PERP1
BB13
SATA_RXN4/PERN1
BD13
SATA_TXP_3
AT13
SATA_RXP_3
BE12
SATA_TXN_3
AR13
SATA_RXN_3
BC12
SATA_TXP_2
AW13
SATA_TXN_2
AY13
SATA_RXN_2
BB9
SATA_RXP_2
BD9
SATA_TXP_1
AW10
SATA_TXN_1
AV10
SATA_TXP_0
AY8
SATA_TXN_0
AW8
SATA_RXP_0
BE8
SATA_RXN_0
BC8
HDA_RST#
C24
SPKR
AL10
HDA_SYNC
A22
HDA_BCLK
B25
HDA_DOCK_RST#/GPIO13
C22
DOCKEN#/GPIO33
B17
TP8
BB2
JME1
SHORT PADS
@ JME1
SHORT PADS
@
12
CH179
1U_0603_10V4Z
CH179
1U_0603_10V4Z
1
2
RH99
1K_0402_5%
RH99
1K_0402_5%
12
T109 PAD@T109 PAD@
CH188
18P_0402_50V8J
CH188
18P_0402_50V8J
1
2
RH121
10K_0402_5%
@
RH121
10K_0402_5%
@
1 2
RH1508 0_0402_5%
@
RH1508 0_0402_5%
@
1 2
RH146 20K_0402_5%RH146 20K_0402_5%
1 2
RH59 51_0402_1%@RH59 51_0402_1%@
12
RH105 1K_0402_5%@RH105 1K_0402_5%@
1 2
RH407.5K_0402_1% RH407.5K_0402_1%
1 2
RH45 210_0402_1%@RH45 210_0402_1%@
1 2
RH106 1K_0402_5%@RH106 1K_0402_5%@
12
T161PAD @T161PAD @
T108 PAD@T108 PAD@
RH44 210_0402_1%@RH44 210_0402_1%@
1 2
CH185 0.01U_0402_16V7KCH185 0.01U_0402_16V7K
12
Y3
32.768KHZ_12.5PF_CM31532768DZFT
Y3
32.768KHZ_12.5PF_CM31532768DZFT
1 2
RH317 10K_0402_5%@RH317 10K_0402_5%@
12
CH189
18P_0402_50V8J
CH189
18P_0402_50V8J
1
2
RH1353
1M_0402_5%
RH1353
1M_0402_5%
12
JCMOS2
SHORT PADS@
JCMOS2
SHORT PADS@
12
RH119 10K_0402_5%RH119 10K_0402_5%
12
RH116
33_0402_5%
RH116
33_0402_5%
1 2
CH187 0.01U_0402_16V7KCH187 0.01U_0402_16V7K
12
CH229
1U_0603_10V4Z
CH229
1U_0603_10V4Z
1
2
CH272 0.01U_0402_16V7KCH272 0.01U_0402_16V7K
12
RH46 210_0402_1%@RH46 210_0402_1%@
1 2
T155PAD @T155PAD @
RH316 10K_0402_5%RH316 10K_0402_5%
12
CH273 0.01U_0402_16V7KCH273 0.01U_0402_16V7K
12