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CPS-1848

™

User Manual

Central Packet Switch

Formal Status

June 2, 2014

Titl

CPS-1848 User Manual 3 June 2, 2014

Formal Status This document is confidential and is subject to an NDA.

Integrated Device Technology

Table of Contents

About this Document....................................................................................................................17

Content Summary.................................................................................................................................................................................... 17

Additional Resources............................................................................................................................................................................... 17

Document Conventions and Definitions................................................................................................................................................... 17

Device Revision Information.................................................................................................................................................................... 18

Revision History....................................................................................................................................................................................... 18

1. Device Overview.......................................................................................................................... 23

1.1 Device Description................................................................................................................................................................................... 23

1.2 Key Features ........................................................................................................................................................................................... 23

1.3 Block Diagrams........................................................................................................................................................................................ 25

1.4 Typical Applications ................................................................................................................................................................................. 26

1.4.1 Wireless Application Benefits................................................................................................................................................... 26

1.4.2 Defense and Aerospace Application Benefits .......................................................................................................................... 27

1.4.3 Video and Imaging Application Benefits................................................................................................................................... 27

2. RapidIO Ports .............................................................................................................................. 28

2.1 Overview.................................................................................................................................................................................................. 28

2.2 Key Features ........................................................................................................................................................................................... 29

2.3 Packet Routing ........................................................................................................................................................................................ 30

2.3.1 Packet Routing Overview......................................................................................................................................................... 30

2.3.2 Unicast Programming Model.................................................................................................................................................... 31

2.3.3 Multicast Programming Model.................................................................................................................................................. 33

2.3.4 Programming Examples........................................................................................................................................................... 34

2.4 Flow Control............................................................................................................................................................................................. 38

2.4.1 Transmitter- and Receiver-Controlled Flow Control Programming Model................................................................................ 38

2.5 Multicast Event Control Symbols............................................................................................................................................................. 39

2.6 Port Reconfiguration Operations.............................................................................................................................................................. 39

2.6.1 Disabling IDLE2 Operation....................................................................................................................................................... 40

2.7 Reset Control Symbol Processing........................................................................................................................................................... 40

2.7.1 Per-Port Reset.......................................................................................................................................................................... 40

2.7.2 Port Disable/Enable..................................................................................................................................................................42

2.7.3 Generating a Reset Request.................................................................................................................................................... 42

2.8 Hot Extraction/Insertion............................................................................................................................................................................42

2.8.1 Hot Extraction........................................................................................................................................................................... 43

2.8.2 Controlled Removal/Reset........................................................................................................................................................ 43

2.8.3 Link Partner Insertion ............................................................................................................................................................... 48

2.9 Packet Trace and Filtering....................................................................................................................................................................... 53

2.9.1 Packet Trace ............................................................................................................................................................................ 53

2.9.2 Packet Filtering......................................................................................................................................................................... 57

2.10 Packet Generation and Capture .............................................................................................................................................................. 57

2.10.1 Packet Generation and Capture Mode Overview..................................................................................................................... 58

2.10.2 Packet Generation and Capture Mode Programming Model.................................................................................................... 59

Table of Contents

CPS-1848 User Manual 4 June 2, 2014

Formal Status This document is confidential and is subject to an NDA.

Integrated Device Technology

2.11 Packet Transfer Validation and Debug..................................................................................................................................................... 62

2.11.1 Overview................................................................................................................................................................................... 62

2.11.2 Successful Packet Transfer...................................................................................................................................................... 63

2.11.3 Switch Cannot Accept Packets................................................................................................................................................. 63

2.11.4 Switch Is Not Routing Packets Correctly.................................................................................................................................. 65

2.11.5 Switch Cannot Transmit Packets.............................................................................................................................................. 66

2.11.6 Requesting Debug Assistance ................................................................................................................................................. 68

3. RapidIO Lanes ............................................................................................................................. 69

3.1 Lane to Port Mapping .............................................................................................................................................................................. 70

3.2 Lane and Port Speeds............................................................................................................................................................................. 73

3.2.1 Lane Speed Change Examples................................................................................................................................................ 73

3.3 Lane, PLL, and Port Power-Down ........................................................................................................................................................... 75

3.4 Port and Lane Initialization Sequence ..................................................................................................................................................... 75

3.4.1 Signal Quality Optimization ...................................................................................................................................................... 76

3.5 Loopback Capabilities.............................................................................................................................................................................. 82

3.5.1 Lane Loopback Modes............................................................................................................................................................. 83

3.5.2 Port Loopback Mode ................................................................................................................................................................ 83

3.6 Bit Error Rate Testing............................................................................................................................................................................... 84

3.6.1 PRBS Polynomials ................................................................................................................................................................... 84

3.6.2 User-Defined Patterns.............................................................................................................................................................. 84

3.6.3 PRBS Pattern Generator.......................................................................................................................................................... 85

3.6.4 PRBS Pattern Checker and Log (Revision C).......................................................................................................................... 85

4. Switch Fabric............................................................................................................................... 87

4.1 Key Features ........................................................................................................................................................................................... 87

4.2 Switch Fabric Architecture....................................................................................................................................................................... 88

4.3 Input Buffer .............................................................................................................................................................................................. 89

4.4 Input Buffer to Crosspoint Buffer Transfers.............................................................................................................................................. 89

4.4.1 VoQ Fairness/Starvation Avoidance......................................................................................................................................... 90

4.4.2 Multicast Packets...................................................................................................................................................................... 90

4.5 Crosspoint Buffers ................................................................................................................................................................................... 90

4.6 Crosspoint Buffer to Final Buffer Transfers.............................................................................................................................................. 91

4.7 Maintenance Transaction Support........................................................................................................................................................... 91

4.8 Final Buffer............................................................................................................................................................................................... 92

5. Performance ................................................................................................................................ 93

5.1 Overview.................................................................................................................................................................................................. 93

5.1.1 Throughput............................................................................................................................................................................... 93

5.1.2 Latency..................................................................................................................................................................................... 93

5.1.3 Latency Variation...................................................................................................................................................................... 94

5.2 Performance Monitoring........................................................................................................................................................................... 94

5.2.1 Traffic Efficiency ....................................................................................................................................................................... 95

5.2.2 Congestion Detection............................................................................................................................................................... 95

5.2.3 Resetting Performance Registers............................................................................................................................................. 95

5.3 Performance Measurements.................................................................................................................................................................... 96

5.3.1 Buffer Management Settings.................................................................................................................................................... 96

5.3.2 Store-and-Forward or Cut-Through Mode................................................................................................................................ 98

5.3.3 Transmitter-Controlled or Receiver-Controlled Flow Control Mode..........................................................

................................ 98

5.4 Port-to-Port Performance Characteristics................................................................................................................................................ 99

5.4.1 Packet Latency Performance ................................................................................................................................................... 99

Table of Contents

CPS-1848 User Manual 5 June 2, 2014

Formal Status This document is confidential and is subject to an NDA.

Integrated Device Technology

5.4.2 Packet Throughput Performance............................................................................................................................................ 100

5.4.3 Multicast Latency Performance.............................................................................................................................................. 102

5.4.4 Multicast Throughput Performance ........................................................................................................................................ 102

5.4.5 Multicast-Event Control Symbol (MECS) Latency.................................................................................................................. 103

6. Event Management.................................................................................................................... 104

6.1 Event Management Overview................................................................................................................................................................ 104

6.1.1 Logical/Transport Layer Events Overview.............................................................................................................................. 108

6.1.2 Physical Layer Error Management Overview ......................................................................................................................... 109

6.1.3 Lane Error Management Overview..........................................................................................................................................111

6.1.4 I2C Error Management Overview............................................................................................................................................112

6.1.5 Configuration Error Management Overview............................................................................................................................113

6.2 Event Detection ......................................................................................................................................................................................113

6.2.1 Logical and Transport Layer Events........................................................................................................................................113

6.2.2 Physical Layer Events.............................................................................................................................................................115

6.2.3 Lane Events............................................................................................................................................................................ 124

6.2.4 I2C Events.............................................................................................................................................................................. 126

6.2.5 JTAG Events (Revision A/B Only) .......................................................................................................................................... 126

6.2.6 Configuration Block Events .................................................................................................................................................... 127

6.2.7 Trace and Filter Events ..........................................................................................................................................................127

6.2.8 Packet Generation and Capture Mode Events....................................................................................................................... 127

6.2.9 Error Log Events..................................................................................................................................................................... 127

6.3 Event Notification................................................................................................................................................................................... 137

6.3.1 Logical Layer Events Notification ........................................................................................................................................... 137

6.3.2 Physical Layer Events Notification ......................................................................................................................................... 139

6.3.3 Lane Event Notification........................................................................................................................................................... 146

6.3.4 I2C Event Notification............................................................................................................................................................. 146

6.3.5 JTAG 1149.1 Event Notification (Revision A/B Only) ............................................................................................................. 147

6.3.6 Configuration Block Event Notification ................................................................................................................................... 147

6.3.7 Trace and Filter Event Notification ......................................................................................................................................... 147

6.3.8 Packet Generation and Capture Mode Event Notification...................................................................................................... 147

6.3.9 Port-Write Formats, Programming Model, and Generation.................................................................................................... 148

6.3.10 Interrupt Notification ............................................................................................................................................................... 152

6.3.11 Error Log Event Notification Programming Model.................................................................................................................. 152

6.4 Event Isolation ....................................................................................................................................................................................... 154

6.4.1 Fatal Link Response Timeout Isolation .................................................................................................................................. 156

6.4.2 Received Retry Count Trigger Congestion Isolation .............................................................................................................. 157

6.4.3 TTL Event Isolation.................................................................................................................................................................157

6.4.4 Transmit Packet Dropped via CRC Retransmit Limit Isolation............................................................................................... 157

6.4.5 Packet Received With a CRC Error While CRC Error Suppression Enabled Isolation .......................................................... 157

6.4.6 Software Controlled Isolation Functions................................................................................................................................. 158

6.5 Event Clearing and Recovery................................................................................................................................................................ 158

6.5.1 Logical Layer Event Clearing and Handling ........................................................................................................................... 158

6.5.2 Physical Layer Events Clearing and Handling........................................................................................................................ 159

6.5.3 Lane Event Clearing and Handling......................................................................................................................................... 167

6.5.4 I2C Event Clearing and Handling........................................................................................................................................... 167

6.5.5 JTAG 1149.1 Events (Revision A/B Only) .............................................................................................................................. 168

6.5.6 Configuration Block Events .................................................................................................................................................... 168

6.5.7 Trace, Filter, and PGC Events................................................................................................................................................ 169