7
TLIN1028S-Q1
www.ti.com
SLLSFG0 –NOVEMBER 2019–REVISED NOVEMBER 2019
Product Folder Links: TLIN1028S-Q1
Submit Documentation FeedbackCopyright © 2019, Texas Instruments Incorporated
ELECTRICAL CHARACTERISTICS (continued)
parameters valid over –40℃ ≤ T
J
≤ 150 ℃ range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
BUS_CNT
Receiver center threshold (ISO/DIS 17987 Param
19)
V
BUS_CNT
= (V
IL
+ V
IH
)/2; Figure 7, Figure 8 0.475 0.5 0.525 V
SUP
V
HYS
Hysteresis voltage (ISO/DIS 17987 Param 20) V
HYS
= (V
IL
- V
IH
); Figure 7, Figure 8 0.175 V
SUP
V
SERIAL_DIODE
Serial diode LIN term pull-up path (ISO/DIS
17987 Param 21)
By design and characterization 0.4 0.7 1.0 V
R
SLAVE
Pull-up resistor to V
SUP
(ISO/DIS 17987 Param
26)
Normal and Standby modes 20 45 60 kΩ
I
RSLEEP
Pull-up current source to V
SUP
Sleep mode, V
SUP
= 12 V, LIN = GND –20 –2 µA
C
LIN,PIN
Capacitance of the LIN pin 55 pF
EN INPUT TERMINAL
V
IH
High level input voltage 2 5.5 V
V
IL
Low level input voltage –0.3 0.8 V
V
HYS
Hysteresis voltage By design and characterization 30 500 mV
I
IL
Low level input current EN = Low –5 0 5 µA
R
EN
Internal pull-down resistor 125 350 800 kΩ
I
LKG
Leakage current, high-level LIN = V
SUP
, nRST = V
CC
–5 5 µA
V
OL
Low-level output voltage Based upon external pull up to V
CC
0.2 V
CC
I
OL
Low-level output current, open drain LIN = 0 V, nRST = 0.4 V 1.5 mA
DUTY CYCLE CHARACTERISTICS
D1
12V
Duty Cycle 1 (ISO/DIS 17987 Param 27)
TH
REC(MAX)
= 0.744 x V
SUP
,
TH
DOM(MAX)
= 0.581 x V
SUP
,
V
SUP
= 5.5 V to 18 V, t
BIT
= 50 µs (20 kbps),
D1 = t
BUS_rec(min)
/(2 x t
BIT
) (See Figure 14,
Figure 15)
0.396
D2
12V
Duty Cycle 2 (ISO/DIS 17987 Param 28)
TH
REC(MIN)
= 0.422 x V
SUP
,
TH
DOM(MIN)
= 0.284 x V
SUP
, V
SUP
= 5.5 V to
18 V,
t
BIT
= 50 µs (20 kbps), D2 = t
BUS_rec(MAX)
/(2 x
t
BIT
) (See Figure 14, Figure 15)
0.581
D3
12V
Duty Cycle 3 (ISO/DIS 17987 Param 29)
TH
REC(MAX)
= 0.778 x V
SUP
, TH
DOM(MAX)
=
0.616 x V
SUP
,
V
SUP
= 5.5 V to 18 V, t
BIT
= 96 µs (10.4
kbps),
D3 = t
BUS_rec(min)
/(2 x t
BIT
) (See Figure 14,
Figure 15)
0.417
D4
12V
Duty Cycle 4 (ISO/DIS 17987 Param 30)
TH
REC(MIN)
= 0.389 x V
SUP
,
TH
DOM(MIN)
= 0.251 x V
SUP
,
V
SUP
= 5.5 V to 18 V, t
BIT
= 96 µs (10.4
kbps),
D4 = t
BUS_rec(MAX)
/(2 x t
BIT
) (See Figure 14,
Figure 15)
0.59
7.8 AC SWITCHING CHARACTERISTICS
parameters valid over –40℃ ≤ T
J
≤ 150 ℃ range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DEVICE SWITCHING CHARACTERISTICS
t
rx_pdr
t
rx_pdf
Receiver rising/falling propagation delay time
(ISO/DIS 17987 Param 31)
R
RXD
= 2.4 kΩ, C
RXD
= 20 pF
(See Figure 16, Figure 17 and Figure 21)
6 µs
t
rs_sym
Symmetry of receiver propagation delay time
Receiver rising propagation delay time (ISO/DIS
17987 Param 32)
Rising edge with respect to falling edge,
(t
rx_sym
= t
rx_pdf
– t
rx_pdr
), R
RXD
= 2.4 kΩ, C
RXD
= 20 pF (Figure 16, Figure 17 and Figure 21)
–2 2 µs
t
LINBUS
LIN wakeup time (minimum dominant time on LIN
bus for wakeup)
See Figure 20, Figure 24 and Figure 25 25 100 150 µs
t
CLEAR
Time to clear false wakeup prevention logic if LIN
bus had a bus stuck dominant fault (recessive
time on LIN bus to clear bus stuck dominant fault)
See Figure 25 8 17 50 µs
t
TXD_DTO
Dominant state time out 20 34 80 ms
剩余38页未读，继续阅读
不觉明了
- 粉丝: 3422
- 资源: 5648
我的内容管理
展开
最新资源
- 计算机人脸表情动画技术发展综述
- 关系数据库的关键字搜索技术综述：模型、架构与未来趋势
- 迭代自适应逆滤波在语音情感识别中的应用
- 概念知识树在旅游领域智能分析中的应用
- 构建is-a层次与OWL本体集成：理论与算法
- 基于语义元的相似度计算方法研究：改进与有效性验证
- 网格梯度多密度聚类算法：去噪与高效聚类
- 网格服务工作流动态调度算法PGSWA研究
- 突发事件连锁反应网络模型与应急预警分析
- BA网络上的病毒营销与网站推广仿真研究
- 离散HSMM故障预测模型：有效提升系统状态预测
- 煤矿安全评价：信息融合与可拓理论的应用
- 多维度Petri网工作流模型MD_WFN：统一建模与应用研究
- 面向过程追踪的知识安全描述方法
- 基于收益的软件过程资源调度优化策略
- 多核环境下基于数据流Java的Web服务器优化实现提升性能
资源上传下载、课程学习等过程中有任何疑问或建议，欢迎提出宝贵意见哦~我们会及时处理！
点击此处反馈
