STM8编程指南：快速入门与问题解决

需积分: 9 8 浏览量更新于2024-07-18 收藏 836KB PDF 举报

STM8编程手册是一份详细的文档，专门针对STM8系列HCMOS微控制器进行编程指导。STM8微控制器家族以其8位工业标准核心和丰富的外围模块设计而闻名，这些模块包括ROM、Flash、RAM、EEPROM、I/O接口、串行接口（如SPI、USART和I2C）、16位定时器、A/D转换器、比较器以及电源管理单元等，旨在为特定应用提供经济高效的解决方案。该系列微控制器广泛应用于汽车系统、遥控器、视频显示器、车载收音机以及众多消费电子、工业、通信和多媒体产品中。STM8作为STMicroelectronics 8位微控制器产品线的一部分，其设计灵活，可以根据项目需求配置不同的功能组合。手册的核心内容分为几个部分： 1. STM8架构：这部分详细介绍了STM8微控制器的设计原理和整体结构，包括开发支持工具和技术。读者可以了解到STM8在硬件上的特性和优势，以及如何利用这些特性进行高效编程。 2. STM8增强特性：这部分阐述了STM8相对于同类产品在性能、功耗和集成度方面的改进，以及如何利用这些特性来优化应用程序的执行效率和能效。 3. 术语表：为了帮助理解复杂的微控制器概念，手册还附有术语表，定义了专业术语，方便开发者查阅和理解。 4. STM8核心描述：深入讲解CPU的工作原理，包括CPU寄存器的详细介绍，这对于理解程序执行流程和调试至关重要。 5. STM8内存接口：这部分涵盖了程序空间（存放可执行代码）和数据空间（存放变量和常量）的组织方式，以及如何通过这些接口进行有效的内存管理和数据操作。 6. 实践指南：手册还包括实际编程示例和调试技巧，以便新手快速上手，并帮助经验丰富的开发者解决可能遇到的问题。通过这份STM8编程手册，无论是初学者还是经验丰富的开发人员都能找到所需的信息，提升对STM8系列微控制器的运用能力。同时，由于STM8广泛应用于各种领域，这份文档对于推动各种应用场景下的技术创新和发展具有重要作用。

STM8 core description PM0044

16/162 Doc ID 13590 Rev 3

● I0: Interrupt mask level 0

See Flag I1

● N: Negative

When set to 1, this bit indicates that the result of the last arithmetic, logical or data

manipulation is negative (i.e. the most significant bit is a logic 1).

● Z: Zero

When set to 1, this bit indicates that the result of the last arithmetic, logical or data

manipulation is zero.

● C: Carry

When set, C indicates that a carry or borrow out of the ALU occurred during the last

arithmetic operation on the MSB operation result bit (bit 7 for 8-bit result/destination or

bit 15 for 16-bit result). This bit is also affected during bit test, branch, shift, rotate and

load instructions. See ADD, ADC, SUB, SBC instructions.

In bit test operations, C is the copy of the tested bit. See BTJF, BTJT instructions.

In shift and rotates operations, the carry is updated. See RRC, RLC, SRL, SLL, SRA

instructions.

This bit can be set, reset or complemented by software using SCF, RCF, CCF

instructions.

Example: Addition

$B5 + $94 = "C" + $49 = $149

The results of each instruction on the Condition Code register are shown by tables in

Section 7: STM8 instruction set. The following table is an example:

where

C7 0

0 10110101

C7 0

+0 10010100

C7 0

=1 01001001

VI1HI0NZC

V0 0NZ1

Nothing = Flag not affected

Flag name =Flag affected

0 = Flag cleared

1 = Flag set

PM0044 STM8 memory interface

Doc ID 13590 Rev 3 17/162

4 STM8 memory interface

4.1 Program space

The program space is 16-Mbyte and linear. To distinguish the 1, 2 and 3 byte wide

addressing modes, naming has been defined as shown in Figure 3:

● "Page" [0xXXXX00 to 0xXXXXFF]: 256-byte wide memory space with the same two

most significant address bytes (XXXX defines the page number).

● "Section" [0xXX0000 to 0xXXFFFF]: 64-Kbyte wide memory space with the same most

significant address byte (XX defines the section number).

The reset and interrupt vector table are placed at address 0x8000 for the STM8 family.

(Note: the base address may be different for later implementations.) The table has 32 4-byte

entries: RESET, Trap, NMI and up to 29 normal user interrupts. Each entry consists of the

reserved op-code 0x82, followed by a 24-bit value: PCE, PCH, PCL address of the

respective Interrupt Service Routine. The main program and ISRs can be mapped

anywhere in the 16 Mbyte memory space.

CALL/CALLR and RET must be used only in the same section. The effective address for the

CALL/RET is used as an offset to the current PCE register value. For the JP, the effective

address 16 or 17-bit (for indexed addressing) long, is added to the current PCE value. In

order to reach any address in the program space, the JPF jump and CALLF call instructions

are provided with a three byte extended addressing mode while the RETF pops also three

bytes from the stack.

As the memory space is linear, sections can be crossed by two CPU actions: next

instruction byte fetch (PC+1), relative jumps and, in some cases, by JP (for indexed

addressing mode).

Note: For safe memory usage, a function which crosses sections MUST:

- be called by a CALLF

- include only far instructions for code operation (CALLF & JPF)

All label pointers are located in section 0 (JP [ptr.w] example: ptr.w is located in section 0

and the jump address in current section)

Any illegal op-code read from the program space triggers a MCU reset.

4.2 Data space

The data space is 16-Mbyte and linear. As the stack must be located in section 0 and as

data access outside section 0/1 can be managed only with LDF instructions, frequently used

data should be located in section 0 to get the optimum code efficiency.

All data pointers are located in section 0 only.

Indexed addressing (with 16-bit index registers and long offset) allows data access over

section 0 and 1.

All the peripherals are memory mapped in the data space.

剩余161页未读，继续阅读

qq_32083999

粉丝: 0
资源: 1

STM8编程指南：快速入门与问题解决

STM8S编程手册

STM8S系列用户开发手册（寄存器版）中文版本

STM8文档资料 STM8_FLASH编程手册

stm8中文编程手册

stm8开发mpu6500

stm32L476HAL库编程手册和STM32标准库编程手册以及MSP430编程手册下载

stm32f030c8 编程手册

stm32h7编程手册

stm32f030x4x6x8编程手册

stm32f103 编程手册 下载

最新资源

stm32f103 编程手册下载