7.4 Thermal Information
THERMAL METRIC
(1)
TPS3704x-Q1
UNITDDF
PINS
R
θJA
Junction-to-ambient thermal resistance 121.5 °C/W
R
θJC(top)
Junction-to-case (top) thermal resistance 60.6 °C/W
R
θJB
Junction-to-board thermal resistance 42.3 °C/W
Ψ
JT
Junction-to-top characterization parameter 2.2 °C/W
Ψ
JB
Junction-to-board characterization parameter 42.1 °C/W
R
θJC(bot)
Junction-to-case (bottom) thermal resistance N/A °C/W
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
7.5 Electrical Characteristics
At 1.7 V ≤ V
DD
≤ 5.5 V,
RESETx Voltage (V
RESETx
) = 10 kΩ to V
DD
, RESETx load = 10 pF, and over the operating free-air
temperature range of – 40°C to 125°C, unless otherwise noted. Typical values are at T
A
= 25°C, typical conditions at
V
DD
= 3.3 V.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
DD
Supply Voltage 1.7 5.5 V
UVLO Under Voltage Lockout
(1)
V
DD
falling below 1.7 V 1.2 1.5 1.7 V
UVLO
(HYS)
UVLO Hysteresis
(2)
V
DD
rising below 1.7 V 50 mV
V
POR
Power on reset voltage
(3)
V
OL (MAX)
= 0.3 V, I
OUT
= 15 µA 0.7 V
V
IT
Range Nominal Threshold Programming Range 0.4 5 V
V
IT
Resolution Input Threshold Resolution 0.85 1 mV
V
IT- (UV)
UV accuracy (25℃) ±0.25 %
V
IT+ (OV)
OV accuracy (25℃) ±0.25 %
TOL Tolerance Programming Range Window variants (V
IT
> 520 mV) 3 11 %
TOL Tolerance Programming Range Window variants (400 mV < V
IT
< 500 mV) 3 9 %
THR RES Low Threshold Programming Resolution Low V
IT
≤ 0.8 V 20 mV / step
THR RES Mid Threshold Programming Resolution Mid 0.8 V < V
IT
≤ 4.0 V 0.5 % / step
THR RES High
Threshold Programming Resolution
High
V
IT
> 4.0 V 20 mV / step
V
IT
Accuracy for absolute threshold
including tolerance
V
IT
= 0.4 V - 0.72 V -1.6 1.6 %
V
IT
Accuracy for absolute threshold
including tolerance
V
IT
= 0.74 V - 5.55 V -1 1 %
V
HYS
Hysteresis Voltage > 800 mV 0.63 0.75 0.90 %
V
HYS
Hysteresis Voltage < 800 mV 1.1 1.4 1.7 %
I
DD
TPS3704x V
DD
≤ 5.5 V 5.5 20 µA
I
SENSEx
Input current, SENSEx pin V
SENSEx
= 5.5 V 1 2.5 µA
V
OL
Low level output voltage VDD = 1.7 V, I
SINK
= 0.4 mA 300 mV
V
OL
Low level output voltage VDD = 2 V, I
SINK
= 3 mA 300 mV
V
OL
Low level output voltage VDD = 5.5 V, I
SINK
= 5 mA 300 mV
I
(lkg)
Open drain output leakage current V
DD
= V
RESETx
= 5.5 V 350 nA
(1) RESETx pin is driven low when V
DD
falls below UVLO.
(2) Hysteresis is with respect of the tripoint (V
IT- (UV)
, V
IT+ (OV)
).
(3) V
POR
is the minimum V
DD
voltage level for a controlled output state. Slew rate = 100 mV / µs.
www.ti.com
TPS3704-Q1
SNVSBS9 – MARCH 2021
ADVANCE INFORMATION
Copyright © 2021 Texas Instruments Incorporated
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