2021年8月IEEE固态电路杂志：毫米波技术与高速信号处理突破

JSSC

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《IEEE Journal of Solid-State Circuits》(JSSC) 2021年8月号刊载了一系列前沿的固态电路研究论文，涵盖了毫米波通信、信号处理和模拟/数字转换器等关键领域。本期刊的特色在于其深度聚焦于晶体管级集成电路设计，下面是一些主要的研究亮点： 1. **毫米波接收器设计**：R.Garg等人提出了一种创新的28 GHz宽带空间滤波MIMO接收器（A28-GHz Beam-Space MIMORX），采用频率分段多路复用(IF Interface)技术，提升了系统性能并实现了单线接口的高效利用。 2. **宽带功率放大器分析与设计**：F.Wang和H.Wang合作研究了一款超紧凑的线性mm-wave功率放大器，采用分布式平衡输出网络，针对宽频谱应用进行了深入探讨和实际设计。 3. **高性能信号发生器**：X.Liu等人介绍了一种无变容器的59至276 GHz CMOS信号发生器，采用双模式ILFD技术，展示了在高频率范围内的先进信号生成能力。 4. **高速开关电容DAC**：P.Caragiulo等人展示了一个28 GS/s的2×时间交错8位、面积仅为0.03 mm²的开关电容数字到模拟转换器（DAC），体现了极小化尺寸与高速度的集成解决方案。 5. **高性能模拟-数模转换器**：E.Swindlehurst等人的工作涉及一款10 GHz、10 ENOB、21 mW的10 GS/s时间交错SAR ADC，采用分组DAC电容器和双路径 bootstrap开关，提升了转换效率和精度。 6. **低功耗高精度ADC**：B.Hershberg等人开发了4 GS/s、10 ENOB、75 mW的环形增益ADC，采用16 nm CMOS工艺，且集成了背景监测功能，旨在减少失真并提高整体系统性能。 7. **时交错第二代架构**：文章结尾提到的时间交错技术被应用于其他高性能器件，但具体的细节并未在摘要中详述，可以推测这可能是对高速数据转换或高频通信系统中的重要技术进展。这些研究不仅推动了固态电路领域的技术创新，也为未来无线通信、雷达和航空航天系统的高性能电子设计提供了关键技术支持。随着科技的发展，JSSC将继续引领电路设计的前沿，为业界带来更多突破性的成果。

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Jun. 2007.

Robin Garg (Graduate Student Member, IEEE)

received the B.Tech. degree in electrical engineering

from IIT Madras, Chennai, India, in 2010, and

the M.S. degree in electrical engineering and com-

puter science from Oregon State University (OSU),

Corvallis, OR, USA, in 2016, where he is currently

pursuing the Ph.D. degree.

From 2010 to 2014, he was an RF Design Engineer

at Texas Instruments India Pvt. Ltd., Bengaluru,

India, where he worked on Wireless Connectivity

Solutions. In 2016, he joined Cypress Semiconduc-

tors Pvt. Ltd., Lynnwood, WA, USA. His research interests are integrated

circuits and systems’ design for wireless RF/mm-wave transceivers.

Mr. Garg received the Outstanding Student Designer Award from Analog

De vices Inc. for excellence in IC design in 2020. He was a recipient of the Best

Student Paper Awa rd (Second Place) at the IEEE Radio Frequency Integrated

Circuits Symposium (RFIC) in 2020. He is an Active Member of the IEEE

Solid-Circuits Society (IEEE-SSCS) for the past ﬁve years and serves as the

Chair for the SSCS Oregon State University Student Chapter. He has been

serving as a reviewer for various IEEE journals/transactions since 2017.

Gaurav Sharma (Student Member, IEEE) received

the B.E. degree in electronics and communica-

tions engineering from Delhi University, New Delhi,

India, in 2012, and the M.Eng. degree in electrical

engineering from Oregon State University, Corvallis,

OR, USA, in 2019.

From 2012 to 2014, he was an Analog Design

Engineer with Wireline Connectivity Solutions

Group, Cadence Design Systems, Bengaluru, India.

In 2014, he joined the Sensors Group, STMicroelec-

tronics, Greater Noida, India, where he developed

low-power and high-precision temperature sensors until 2017. His research

interests include RF, mm-wave integrated circuits, and low-power MOS analog

integrated circuits.

Ali Binaie (Student Member, IEEE) received the

B.S. degree (Hons.) from Shiraz University, Shiraz,

Iran, in 2012, and the M.Sc. degree from the Sharif

Uni versity of Technology, Tehran, Iran, in 2014.

He is currently pursuing the Ph.D. degree in elec-

trical engineering with Columbia University, New

York, NY, USA.

GARG et al.: 28-GHz BEAM-SPACE MIMO RX 2307

Sanket Jain (Member, IEEE) received the B.E.

degree (Hons.) in electronics and instrumentation

from the Birla Institute of Technology and Science,

Pilani, India, in 2009, the M.Sc. degree in elec-

trical engineering from the Swiss Federal Institute

of Technology, Lausanne, Switzerland, in 2013, and

the Ph.D. degree from Oregon State University,

Corvallis, OR, USA, in September 2019, where his

research focused on RF and mm-wave transcei ver

design.

From 2013 to 2014, he was a Scienpngic Collab-

orator at the Institute of Microengineering, Neuchatel, Switzerland.

Dr. Jain received the Swiss Government Scholarship from the Swiss

Embassy , EPFL, from 2011 to 2013, the International Scholarship from

K.U. Leuven, Belgium, in 2012, and the Rickert Engineering Fellowship at

Oregon State University in 2014. In 2018, he receive d the Analog Devices

Outstanding Student Designer Awa rd. He serves as a Reviewer for the

IEEE T

RANSACTIONS ON BIOMEDICAL CIRCUITS AND SYSTEMS (TBIO-

CAS), the IEEE T

RANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR

PAPERS (TCAS-I), the IEEE MICROWAVE AND WIRELESS COMPONENTS

LETTERS (MWCL), the IEEE TRANSACTIONS ON MICROWAVE THEORY

AND TECHNI QUES (TMTT), and the IEEE JOURNAL OF SOLID-STATE

CIRCUI TS (JSSC).

Sohail Ahasan (Graduate Student Member, IEEE)

received the B.Tech. degree in electrical engineering

from IIT Kharagpur, Kharagpur, India, in 2016,

and the M.S. degree in electrical engineering from

Columbia University, New York, NY, USA, in 2018,

where he is currently pursuing the Ph.D. degree in

electrical engineering.

During his undergraduate studies, he was involved

in the implementation of digital low dropout reg-

ulators with low settling time and high efﬁcienc y.

His research interests include exploring new archi-

tectures to enable scalable mm-wave MIMO arrays, full-duplex receivers, and

ultralow-po wer IoT receivers. He is also interested in designing integrated

electro-optical phase-locked loops (EOPLLs) for LIDAR imaging systems.

Mr. Ahasan was a co-recipient of the IEEE RFIC Symposium Best Student

Paper Award (Second Place) in 2020 and the 2020 ISSCC Analog Devices

Outstanding Student Designer Award.

Armagan Dascurcu (Student Member, IEEE)

received the B.S. degrees in electronics engineering

and mechatronics engineering from Sabanci Univer-

sity, Istanbul, Turke y, in 2016 and 2017, respectively,

and the M.S. degree in electrical engineering from

Columbia University, New York, NY, USA, in 2018,

where she is currently pursuing the Ph.D. degree.

Her research interests include RF/analog and mm-

wave integrated circuits and systems in silicon

technologies for phased-array and multi-input-multi-

output (MIMO) systems.

Ms. Dascurcu was a recipient of the 2016 MTT-S Undergraduate/Pre-

Graduate Scholarship Award.

Harish Krishnaswamy (Member, IEEE) received

the B.Tech. degree in electrical engineering from

IIT Madras, Chennai, India, in 2001, and the M.S.

and Ph.D. degrees in electrical engineering from

the University of Southern California (USC), Los

Angeles, CA, USA, in 2003 and 2009, respectively.

In 2009, he joined the Electrical Engineering

Department, Columbia University, New York, NY,

USA, where he is currently an Associate Professor

and the Director of the Columbia High-Speed and

Millimeter-Wa ve IC Laboratory (CoSMIC). In 2017,

he co-founded MixComm Inc., Chatham, NJ, USA, a venture-backed startup,

to commercialize CoSMIC Laboratory’s advanced wireless research. His

research interests include integrated devices, circuits, and systems for various

RF, millimeter-wave (mmWave), and sub-mmWave applications.

Dr. Krishnaswamy has been a member of the Technical Program Committee

of seve ral conferences, including the IEEE International Solid-State Circuits

Conference since 2015 and the IEEE Radio Frequency Integrated Circuits

Symposium since 2013. He was a recipient of the IEEE International Solid-

State Circuits Conference Lewis Winner Award for Outstanding Paper in 2007,

the Best Thesis in Experimental Research Award from the USC Viterbi School

of Engineering in 2009, the Defense Advanced Research Projects Agency

Young Faculty Award in 2011, the 2014 IBM Faculty Award, the Best Demo

Award at the 2017 IEEE ISSCC, the Best Student Paper Awards (First Place) at

the 2015 and 2018 IEEE Radio Frequency Integrated Circuits Symposium, and

the 2019 IEEE MTT-S Outstanding Young Engineer Award. He also serves

as a Distinguished Lecturer for the IEEE Solid-State Circuits Society and a

member of the DARPA Microelectronics Exploratory Council.

Arun S. Natarajan (Member, IEEE) received the

B.Tech. degree from IIT Madras, Chennai, India,

in 2001, and the M.S. and Ph.D. degrees from the

California Institute of Technology, Pasadena, CA,

USA, in 2003 and 2007, respectively, all in electrical

engineering.

From 2007 to 2012, he was a Research Staff

Member with the IBM T. J. Watson Research Center,

Yorktown Heights, NY, USA, where he worked on

millimeter-wave (mm-wave) phased arrays for multi-

Gb/s data links and airborne radar and on self-

healing circuits for increased yield in submicrometer process technologies.

In 2012, he joined Oregon State Uni versity, Corv allis, OR, USA, where he

is currently an Associate Professor with the School of EECS. His research is

focused on RF, mm-wa ve, and sub-mm-wave integrated circuits and systems

for high-speed wireless communication and imaging.

Dr. Natarajan was a recipient of the National Talent Search Scholarship from

the Government of India from 1995 to 2000, the Caltech Atwood Fellowship in

2001, the IBM Research Fellowship in 2005, the 2011 Pat Goldberg Memorial

Award for the Best Paper in Computer Science, Electrical Engineering, and

Mathematics published by IBM Research, the CDADIC Best Faculty Project

Awards in 2014 and 2016, the NSF CAREER Award in 2016, the Oregon State

Uni versity Engelbrecht Young Faculty Award in 2016, and the DARPA Young

Faculty Award in 2017. He also serves on the Technical Program Committee

of the IEEE International Solid-State Circuits Conference (ISSCC) and the

IEEE Radio frequency Inte grated Circuits Conference (RFIC). He is also an

Associate Editor of the IEEE T

RANSACTIONSON MICROWAVE THEORY AND

TECHNI QUES. He has served as a Distinguished Lecturer for the IEEE SSCS

and the TPC of the IEEE Compound Semiconductors IC Symposium (CSICS).

He has served as an Associate Editor for the IEEE T

RANSACTIONS ON VERY

LARGE SCALE INTEGRATION (VLSI) SYSTEMS and a Guest Editor for the

IEEE J

OURNAL O F SOLID-STATE CI RCUITS.

2308 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 56, NO. 8, AUGUST 2021

A Broadband Linear Ultra-Compact mm-Wave

Power Ampliﬁer With Distributed-Balun Output

Network: Analysis and Design

Fei Wang , Graduate Student Member, IEEE,andHuaWang , Senior Member, IEEE

Abstract—This article presents a broadband power ampliﬁer

(PA) with a distributed-balun output network that provides

the PA optimum load impedance over a wide bandwidth. The

proposed output network comprises two coupled-line sections

and absorbs the device output capacitance. It employs a scal-

able coupled-line modeling approach that captures both the

magnetic (inductive) and electric (capacitive) couplings between

windings with fewer parameters and supports a rapid design

process. Closed-form design solutions, design space limitations,

bandwidth limits, and design tradeoffs are derived and ana-

lyzed comprehensively. Its extension to differential output and

common-mode response is also discussed in detail. As a proof

of concept, a prototype PA is implemented for multiband ﬁfth-

generation (5G) applications in 45-nm SOI CMOS. With no

biasing retuning or network reconﬁguration, the PA consistently

achieves >19.1 dBm P

sat

, >37.3% peak power-added efﬁciency

(PAE), 17.8–19.6 dBm P

1dB

, and 36.6%–44.3% PAE

P1dB

over 24–

40 GHz, verifying the truly wideband large-signal matching. The

PA demonstrates 5G new radio (NR) frequency range 2 (FR2)

modulation signals over 24–42 GHz, covering n257/n258/n260 5G

bands. For 5G NR FR2 800-MHz 2-CC 64-QAM signals (11.78-

dB PAPR), the PA achieves 11.3-dBm/16.6% average P

out

/PAE

with −25.1-dB rms EVM at 28-GHz and 10.2-dBm/13.6% aver-

age P

out

/PAE with −25.1-dB rms EVM at 37 GHz.

Index Terms—Broadband, efﬁciency, enhanced mobile broad-

band (eMBB), ﬁfth generation (5G), frequency range 2 (FR2),

linearity, multiple-input–multiple-output (MIMO), new radio

(NR), power ampliﬁer (PA), power-added efﬁciency (PAE).

I. INTRODUCTION

ILLIMETER-WAVE (mm-Wave) technology is

expected to unleash a plethora of applications in the

ﬁfth generation (5G) [1] and satellite communication, radar

and sensing, aerospace and defense, backhaul, and so on.

Compared to RF/microwave bands, mm-Wave bands provide

Manuscript received July 27, 2020; revised January 28, 2021 and April 9,

2021; accepted May 5, 2021. Date of publication June 22, 2021; date of

current version July 23, 2021. This article was approve d by Associate Editor

Payam Heydari. This work was supported in part by Defense Advanced

Research Projects Agency (DARPA), in part by ARMY, in part by Qorvo,

in part by GlobalFoundries, and in part by the Qualcomm Innovation Fellow-

ship. This article was presented at the IEEE Solid-State Circuit Conference

(ISSCC), San Francisco, CA, USA, February 2020. (Corresponding author:

Fei Wang.)

Fei Wang was with the School of Electrical and Computer Engineering,

Georgia Institute of Technology, Atlanta, GA 30308 USA. He is no w with

Apple Inc., Cupertino, CA 95014 USA (e-mail: feiwang@gatech.edu).

Hua Wang is with the School of Electrical and Computer Engineer-

ing, Georgia Institute of Technology, Atlanta, GA 30308 USA (e-mail:

hua.wang@ece.gatech.edu).

Color versions of one or more ﬁgures in this article are av a ilable at

https://doi.org/10.1109/JSSC.2021.3078485.

Digital Object Identiﬁer 10.1109/JSSC.2021.3078485

Fig. 1. Power devices and the optimum load impedance.

huge available spectrum that can deliver extreme data rate and

capacity. The 5G communication promises a 10–100× data

rate increase to enable enhanced mobile broadband (eMBB)

and radically change future wireless connectivity. The

3GPP 5G new radio (NR) standard speciﬁes n257 band

(26.50–29.50 GHz), n258 band (24.25–27.50 GHz), and

n260 band (37.00–40.00 GHz) as the frequency range 2

(FR2) allocation [2], [3]. Different FR2 bands or their subsets

are adopted by various countries and regions worldwide, which

necessitates wideband or multiband mm-Wave 5G systems to

support international and cross-network roaming, particularly

for user equipment (UE) devices. In addition, 5G NR also

poses unprecedented requirement for large instantaneous

bandwidth. Besides high-data-rate communication, wide

bandwidth can unlock the full potential of augmented reality

(AR), virtual reality (VR), and mixed reality (MR) [4] and is

essential for high-resolution r adar and sensing [5].

In addition to the output power and efﬁciency metrics,

these applications further mandate wideband operation on

mm-Wave power ampliﬁers (PAs). Most existing wideband PA

architectures often suffer from various limitations [6]–[32].

Distributed ampliﬁers have degraded energy efﬁciency due

to non-optimum load impedance at each stage [13]–[17].

Balanced ampliﬁers r equire wideband 90

◦

hybrids that are

often bulky and lossy for on-chip implementations [18]–[21].

Staggered tuning is only small-signal broadband, and it sac-

riﬁces P

out

and efﬁciency [22], [23]. Continuous-mode PAs

require the power devices to sustain voltage waveforms with

high peaks, which limits its use in low-breakd own-voltage

silicon processes [24]–[26]. Network synthesis for reactive

matching is a popular technique for wideband PAs, which,

however, often exhibits large form factor and poor passive

efﬁciency in actual implementations [27]–[33].

See https://www.ieee.org/publications/rights/index.html for more information.

WANG AND WANG: BROADBAND LINEAR ULTRA-COMPACT mm-WAVE PA 2309

Fig. 2. (a) Extracted cascode PA stage in 45-nm SOI CMOS. (b) Load–pull simulation results at 28 GHz. (c) Load–pull simulation results over 24–42 GHz.

Fig. 3. (a) Transformer balun. (b) Doubly tuned transformer network. (c) and (d) Two coaxial cable baluns introduced by Marchand [75].

Massive multiple-input–multiple-output (MIMO) will be

ubiquitous in 5G systems to signiﬁcantly increase data

rate, coverage of service areas, and comm unication reliabil-

ity [34]–[39]. A large number o f RF chains need to be built

in massive MIMO RF front ends, which favors ultra-compact

PAs that ﬁt within the array form factor with low cost and high

yield, making silicon front ends very attr active [ 34]. In par-

allel, high-order quadrature amplitude modulation (QAM),

orthogonal frequency-division multiplexing (OFDM), and car-

rier aggregation (CA) are extensively used in 5G NR signals to

achieve high spectral efﬁciency, high data rate, and multipath

robustness [2]. However, the resulting highly complex modu-

lations demand high intrinsic PA efﬁciency and linearity sin ce

element-level digital predistortion (DPD) is very challengin g at

multi-Gb/s data rates [40], [41]. Back-off efﬁciency enhance-

ment techniques, e.g., Doherty and outphasing, can potentially

improve the PA average efﬁciency but often come with signiﬁ-

cant area overhead, narrow bandwidth, and complicated signal

pre-conditioning [42]–[55].

To summarize, there is a great need for ultra-compact

wideband “common front-end” PAs with high efﬁciency and

linearity to cover mu ltiple 5G bands. Thus, this article presents

a broadband compact high-efﬁciency linear PA that covers 24–

42 GHz using a distributed-balun output network without any

biasing tuning or network reconﬁguration [56].

This article is organized as follows. Section II revisits the

broadband PA optimum load impedance, balun-based PA

output networks and on-chip transformer models. Section III

details the proposed distributed-balun output network,

including closed-fo rm solutions, design space limitations,

bandwidth limit, design tradeoffs, common-mode response,

and extension to differential output. Section IV shows the

experimental results and benchmarks the prototype design

against recently reported mm-Wave PAs in silicon. Section V

concludes this article.

II. R

EVIEW OF BROADBAND PA OPTIMAL LOAD

IMPEDANCE AND ON-CHIP TRANSFORMERS

A. Broadband PA Optimum Load Impedance

Single-ended and differential PAs are two important

topologies widely adopted in mm-Wave PA designs [42]–[67].

However, it is becoming a clear trend, especially in the mm -

Wave broadband PA regime, to employ differential PAs

due to its inherent advantages [7]. Moreover, differential

PAs are particularly conducive to broadband operations by

enabling capacitive neu tralization that, unlike narrowband

embeddings, sig niﬁcantly improves PA gain and stability

over a broad bandwidth [68]–[70]. Better isolation is also

achieved, which decouples input and output to ease wideband

designs. In addition, differential PAs can use low-impedance

dc feedings through center taps that are free of large biasing

resistors and separated from mm-Wave signal paths. This

alleviates bias-related memory effects and enables high-speed

modulations.

As shown in Fig. 1, maximizing the device output power

out

) requires an optimum load impedance Z

opt

presented

to its output, which can be approximated as an optimum

resistive load in parallel with an inductive part, i.e., Z

opt

||(−1/ jωC

dev

) [7], [27]. The optimum resistive load R

opt

is set by the device load- line condition R

opt

= (V

max

−

knee

)/I

max

,whereV

max

is the maximum output voltage con-

strained by device breakdown characteristics, V

knee

is the

device knee voltage, and I

max

is the maximum output current

determined by the device size and input voltage drive. The

inductive part (−1/ jωC

dev

) is to resonate out the device output

capacitance C

dev

A cascode PA stage in 45-nm SOI CMOS with extracted

parasitics is shown as an example in Fig. 2(a). Its load–pull

simulation results at 28 GHz are shown in Fig. 2(b). The output

power contours and power-added efﬁciency (PAE) contours

2310 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 56, NO. 8, AUGUST 2021

show that the device large-signal output capacitances C

dev

are very close for both cases, while the maximum PAE

case requires a larger optimum resistive load R

opt

than the

maximum P

out

case. The load–pull simulations have been per-

formed for this cascode PA stage over 24–42 GHz. As shown

in Fig. 2(c), R

opt

and C

dev

for p eak PAE and peak P

out

maintain relative constant values over 24–42 GHz and thus

can be assumed as frequency-independent [27]. Therefore,

the broadband PA design requires an output matching network

that absorbs the device output capacitance C

dev

and transforms

the 50- load R

to PA optimum resistive load R

opt

over the

target frequency range.

B. Balun-Based PA Output Networks and On-Chip

Transformer Models

Balun-based output networks are n eeded for differential-to-

single-ended conversion in d ifferential PAs since most systems

require a single-ended output. Among popular balun structures

are transformer baluns and d istributed baluns. A transformer

balun ex ample is shown in Fig. 3(a). Transformers are widely

employed in RF and mm-Wave circuits for differential-to-

single-ended conversion, low-loss ac coupling, impedance

matching/transformation, and power combining [71], [72].

In particular, doubly tuned transformer networks [Fig. 3(b)]

can absorb PA device output capacitance in the network

design and are widely used as broadband PA output net-

works [25]–[31] and load modulation networks [51], [66].

Doubly tuned transformer networks can leverage conventional

Bode forms of transfer functions to link the electrical para-

meters of the output network to its frequency response and

yield r elatively simple closed-form procedures to select the

network parameters [73], [74]. Fig. 3(c) and (d) shows two

distributed balun examples based on coaxial transmission

lines, introduced by Marchand [75]. Both baluns require two

quarter-wavelength transmission line sections, which can be

bulky for on-chip PA output network. The balun in Fig. 3(d)

does not provide galvanic isolation between the balanced and

unbalanced ports as transformer baluns. It has been recently

demonstrated [65], [67] that the required transmission line

electrical length in Fig. 3(d) can be signiﬁcantly reduced.

Transformers are usually modeled as magnetically coupled

inductors in its lumped-element model [Fig. 3(a)], which

only captures the magnetic (inductive) coupling but not the

electric (capacitive) coupling between windings. However,

there are substantial inter-winding capacitances in on-chip

transformers, as shown in Fig. 4(a). The lumped-element

model is thus an approximation that can be used at frequencies

that are sufﬁciently lower than the transformer self-resonant

frequency (SRF) [see Fig. 4(b)]. It is insufﬁcient to capture

various frequency-dependent behaviors and parasitics of a

physical transformer, which is essential in broadband RF/mm-

Wave designs. This discrepancy is further exacerbated by

the low-loss requirement of the PA output network. A high

coupling coefﬁcient k

and high quality factors of primary

and secondary Q

and Q

are needed to improve the passive

efﬁciency given as

η = 1



1 + 2





1 +





(1)

This usually requires reducing the winding-to-winding spac-

ing, increasing the winding width, which causes even more

inter-winding capacitance. As a result, behaviors of the actual

electromagnetic (EM) structures often differ noticeably from

the simple lumped-element model and compromise broadband

performance. For example, most reported broadband PAs only

support broadband gain or P

sat

, but not broadband P

1dB

PAE at P

1dB

(PAE

P1dB

), showing th eir limited cap ability of

ensuring optimum large-signal load impedance over broadband

frequency [30], [31].

To accurately model the on-chip transformer, a large number

of parameters need to be added and some of them are simply

ﬁtting parameters [76]–[78], as shown in Fig. 4 (c). It is

difﬁcult to make such a model truly scalable, and thus, it is

difﬁcult to use during the design stage. Therefore, the lumped-

element model method cannot accurately guide broadband PA

designs.

Alternatively, the parallel windings of the transformer can

be modeled as coupled lines, which captures both mag-

netic (inductive) and electric (capacitive) couplings between

the two windings. The characteristics o f coupled lines can

be speciﬁed in terms of electrical length θ and even-/odd-

mode characteristic impedance Z

and Z

[see Fig. 5(a)]. The

coupled lines can be characterized by its Y matrix given by

⎡

⎢

⎣

−jY

cotθ −jY

cotθ jY

cscθ jY

cscθ

−jY

cotθ −jY

cotθ jY

cscθ jY

cotθ

cscθ jY

cscθ −jY

cotθ −jY

cotθ

cscθ jY

cscθ −jY

cotθ −jY

cotθ

⎤

⎥

⎦

(2)

where Y

= (Y

+ Y

)/2, Y

= (Y

− Y

)/2, Y

= 1/Z

and Y

= 1/Z

⎡

⎢

⎣

−jY

cot2θ j

cscθ − j

cscθ jY

csc2θ

cscθ j

− 2Y

cotθ j

cotθ − j

cscθ

−j

cscθ j

cotθ j

− 2Y

cotθ j

cscθ

csc2θ − j

cscθ j

cscθ − jY

cot2θ

⎤

⎥

⎦

. (4)

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