TVP5150A视频解码器技术手册与供应商信息

TVP5150A

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"TVP5150A是一款超低功耗的NTSC/PAL/SECAM视频解码器，带有强大的同步检测功能。该器件由德州仪器（Texas Instruments，简称TI）制造，适用于数字音频视频应用。数据手册发布于2004年5月，包含了该产品的详细技术规格和使用指南。" TVP5150A是TI推出的一款高性能视频解码芯片，主要设计用于处理标准的模拟电视制式，包括NTSC（美国）、PAL（欧洲）和SECAM（法国）等。这款解码器具有出色的电源效率，能在保证视频质量的同时降低系统功耗，这对于便携式或电池供电的设备尤其重要。该器件的一个关键特性是其内置的强健同步检测器，这确保了在各种信号条件下的稳定工作。同步检测器能够准确识别和恢复视频信号中的同步信息，即使在噪声环境或者信号质量不佳的情况下也能保持良好的解码性能。数据手册详细列出了TVP5150A的电气特性、接口规范、引脚配置、操作模式以及推荐的应用电路。用户可以从中获取如何正确连接和配置该芯片以实现最佳性能的信息。手册还可能包含了故障排查指南，帮助工程师解决在设计和调试过程中遇到的问题。在购买和使用TVP5150A时，需要注意TI有权随时对产品进行修正、修改、增强或改进，并且可能会无通知地停止任何产品或服务的供应。因此，在下单前，客户应获取最新的产品信息并确认其完整性和适用性。TI对其硬件产品按照销售时适用的规格提供标准保修，但除非政府要求，否则不保证对所有参数进行全面测试。对于应用支持或客户产品的设计，TI不承担任何责任。这意味着开发人员需要根据手册提供的信息自行负责产品的系统集成和合规性验证。此外，TI的销售条款和条件会在订单确认时提供，这些条款将构成购买合同的一部分。 TVP5150A是一款针对模拟视频信号处理的专业解码芯片，适合需要高质量视频解码能力且对功耗有严格要求的系统设计。通过详细阅读和理解数据手册，工程师可以充分利用其特性，开发出高效、稳定的视频处理解决方案。

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2−1

2 Functional Description

2.1 Analog Front End

The TVP5150A decoder has an analog input channel that accepts two video inputs, which are ac-coupled. The

decoder supports a maximum input voltage range of 0.75 V; therefore, an attenuation of one-half is needed for most

input signals with a peak-to-peak variation of 1.5 V. The maximum parallel termination before the input to the device

is 75 Ω. Please refer to the applications diagram in Figure 5−1 for the recommended configuration. The two analog

input ports can be connected as follows:

• Two selectable composite video inputs or

• One S-video input

An internal clamping circuit restores the ac-coupled video signal to a fixed dc level.

The programmable gain amplifier (PGA) and the AGC circuit work together to make sure that the input signal is

amplified sufficiently to ensure the proper input range for the ADC.

The ADC has 9 bits of resolution and runs at a maximum speed of 27 MHz. The clock input for the ADC comes from

the PLL.

2.2 Composite Processing Block Diagram

The composite processing block processes NTSC/PAL/SECAM signals into the YCbCr color space. Figure 2−1

explains the basic architecture of this processing block.

Figure 2−1 illustrates the luminance/chrominance (Y/C) separation process in the TVP5150A decoder. The

composite video is multiplied by subcarrier signals in the quadrature modulator to generate the color difference

signals Cb and Cr. Cb and Cr are then low-pass (LP) filtered to achieve the desired bandwidth and to reduce crosstalk.

An adaptive 4-line comb filter separates CbCr from Y. Chroma is remodulated through another quadrature modulator

and subtracted from the line-delayed composite video to generate luma. Contrast, brightness, hue, saturation, and

sharpness (using the peaking filter) are programmable via I

The Y/C separation is bypassed for S-video input. For S-video, the remodulation path is disabled.

2.3 Adaptive Comb Filtering

The 4-line comb filter can be selectively bypassed in the luma or chroma path. If the comb filter is bypassed in the

luma path, then chroma notch filters are used. TI’s patented adaptive 4-line comb filter algorithm reduces artifacts

such as hanging dots at color boundaries and detects and properly handles false colors in high frequency luminance

images such as a multiburst pattern or circle pattern.

2.4 Color Low-Pass Filter

In some applications, it is desirable to limit the Cb/Cr bandwidth to avoid crosstalk. This is especially true in case of

video signals that have asymmetrical Cb/Cr sidebands. The color LP filters provided limit the bandwidth of the Cb/Cr

signals.

Color LP filters are needed when the comb filtering turns off, due to extreme color transitions in the input image.

Please refer to Section 2.20.25, Chrominance Control #2 Register, for the response of these filters. The filters have

three options that allow three different frequency responses based on the color frequency characteristics of the input

video.

2−4

At powerup the host interface is required to program the VDP-configuration RAM (VDP-CRAM) contents with the

lookup table (see Section 2.20.58). This is done through port address C3h. Each read from or write to this address

will auto increment an internal counter to the next RAM location. To access the VDP-CRAM, the line mode registers

(D0h−FCh) must be programmed with FFh to avoid a conflict with the internal microprocessor and the VDP in both

writing and reading. Full field mode must also be disabled.

Available VBI lines are from line 6 to line 27 of both field 1 and field 2. Each line can be any VBI mode.

Output data is available either through the VBI-FIFO (B0h) or through dedicated registers at 90h−AFh, both of which

are available through the I

C port.

2.9 VBI FIFO and Ancillary Data in Video Stream

Sliced VBI data can be output as ancillary data in the video stream in the ITU-R BT.656 mode. VBI data is output during

the horizontal blanking period following the line from which the data was retrieved. Table 2−2 shows the header format

and sequence of the ancillary data inserted into the video stream. This format is also used to store any VBI data into

the FIFO. The size of FIFO is 512 bytes. Therefore, the FIFO can store up to 11 lines of teletext data with the NTSC

NABTS standard.

Table 2−2. Ancillary Data Format and Sequence

BYTE

NO.

(MSB)

D6 D5 D4 D3 D2 D1 D0

(LSB)

DESCRIPTION

0 0 0 0 0 0 0 0 0

Ancillary data preamble

1 1 1 1 1 1 1 1 1

Ancillary data preamble

2 1 1 1 1 1 1 1 1

3 NEP EP 0 1 0 DID2 DID1 DID0 Data ID (DID)

4 NEP EP F5 F4 F3 F2 F1 F0 Secondary data ID (SDID)

5 NEP EP N5 N4 N3 N2 N1 N0 Number of 32 bit data (NN)

6 Video line # [7:0] Internal data ID0 (IDID0)

7 0 0 0 Data

error

Match

Video line # [9:8] Internal data ID1 (IDID1)

8 1. Data Data byte

word

9 2. Data Data byte

1 word

10 3. Data Data byte

11 4. Data Data byte

: : :

m−1. Data Data byte

word

m. Data Data byte

N word

NEP EP CS[5:0] Check sum

4(N+2)−1 1 0 0 0 0 0 0 0 Fill byte

EP: Even parity for D0−D5 NEP: Negated even parity

DID: 91h: Sliced data of VBI lines of first field

53h: Sliced data of line 24 to end of first field

55h: Sliced data of VBI lines of second field

97h: Sliced data of line 24 to end of second field

SDID: This field holds the data format taken from the line mode register of the corresponding line.

NN: Number of Dwords beginning with byte 8 through 4(N+2). This value is the number of Dwords where

each Dword is 4 bytes.

IDID0: Transaction video line number [7:0]

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