IEEE STIL标准：数字测试接口语言与应用

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IEEE Standard Test Interface Language (STIL) 是一个专为数字测试设计的标准，由IEEE Computer Society的Test Technology Standards Committee所赞助，最初于1999年3月18日批准，并在2011年6月16日得到重新确认。该标准是IEEE Std 1450-1999(R2011)，其主要目标是提供一个连接数字测试生成工具和测试设备的接口，从而简化测试过程并确保测试数据的准确传输和应用。 STIL定义了一种测试描述语言，旨在实现以下几个关键功能： 1. **数据交换**：STIL支持数字测试向量（Digital Test Vectors）从计算机辅助工程（Computer-Aided Engineering, CAE）环境无缝转移到自动测试设备（Automatic Test Equipment, ATE）环境。这使得工程师能够在设计阶段就预置测试用例，以便在实际测试过程中高效执行。 2. **详细规格**：它规定了模式、格式和时间信息，这些信息足够明确，使得测试向量能够精确地应用于待测组件（Device Under Test, DUT）。这对于确保测试覆盖范围和准确性至关重要。 3. **结构化测试支持**：STIL不仅包括通用的测试向量类型，如扫描向量（Scan Vectors）、事件向量（Event Vectors）、函数向量（Functional Vectors）等，还涵盖了针对特定结构化测试的大量数据生成。 4. **循环和定时**：STIL允许对测试向量进行循环处理（cyclize），以便重复执行，同时支持对测试事件的定时控制，确保每个信号的波形（Waveform）和波形形状（Waveshape）按照预期进行。 5. **自检与BIST**：STIL与自动测试图案生成器（Automatic Test Pattern Generator, ATPG）紧密集成，有助于实现内置自测试（Built-in Self-Test, BIST）功能，检测DUT内部的逻辑错误或故障。 6. **版权与许可**：该标准由IEEE拥有版权，确保了技术的合法使用和保护，同时促进了整个行业的标准化进程。 STIL是电子和电气工程领域内的一个重要标准，它通过标准化测试语言和接口，促进了测试工具之间的协同工作，提高了测试效率，减少了潜在的误判，并推动了自动化测试技术的发展。对于从事数字电路设计、测试和验证工作的专业人士来说，理解和掌握STIL是提升测试质量和速度的关键。

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IEEE

Std 1450-1999 IEEE STANDARD TEST INTERFACE LANGUAGE (STIL)

In the syntax explanations, the verb “shall” is used to indicate mandatory requirements. The meaning of a

mandatory requirement varies for different readers of the standard:

— To developers of tools that process STIL (“readers”), “shall” denotes a requirement that the standard

imposes. The resulting implementation is required to enforce this requirement and issue an error if

the requirement is not met by the input.

— To developers of STIL ﬁles (“writers”), “shall” denotes mandatory characteristics of the language.

The resulting output must conform to these characteristics.

— To the users of STIL, “shall” denotes mandatory characteristics of the language. Users may depend

on these characteristics for interpretation of the STIL source.

The language deﬁnition clauses contain statements that use the phrase “it is an error,” and “it may be ambig-

uous.” These phrases indicate improperly-deﬁned STIL information. The interpretation of these phrases will

differ for the different readers of this standard in the same way that “shall” differs , as identiﬁed in the

dashed list above (Clause 4).

Waveforms represented in the diagrams use symbols deﬁned in Table 9 through Table 12. Use the informa-

tion in these tables to help understand waveform diagrams.

5. STIL orientation and capabilities tutorial (informative)

This clause presents an overview of STIL through a layered tutorial that explains the language constructs.

This clause is informative and is not a part of IEEE Std 1450-1999, Standard Test Interface Language (STIL)

for Digital Test Vector Data.

5.1 Hello Tester

Figure 3 represents a complete STIL program to exercise a subset of behavior for an octal bus transceiver

design, modeled after a TTL LS245. Details of this design are found in Annex E. This example deﬁnes the

LS245 as “unidirectional.” To simplify this example, the “A” bus signals are deﬁned as inputs, and the “B”

bus signals are deﬁned as outputs. Figure 3 is annotated and explanations (notes) for each of the marked sec-

tions follow the ﬁgure.

NOTE—Figure notes follow all of the annotated ﬁgures in this standard.

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IEEE

Std 1450-1999 IEEE STANDARD TEST INTERFACE LANGUAGE (STIL)

Notes for Figure 3.

NOTE 1—The very ﬁrst statement in a STIL ﬁle is the STIL statement. This statement deﬁnes the version of the STIL

language following this statement.

NOTE 2—The Signals block deﬁnes a name for each signal used in the test vectors and identiﬁes the signal type, such as

In, Out, InOut, Supply, or Pseudo. Remember that in this example the bidirectional busses of the LS245 design are

deﬁned as unidirectional and, therefore, only In and Out are used here.

NOTE 3—The SignalGroups block deﬁnes an ordered set of signals to be referenced in subsequent operations. In this

example, three groups are deﬁned: a collection of all bits of the “A” bus, called ABUS; a collection of all bits of the “B”

bus, called BBUS; and a collection of all signals in the design called ALL. ALL has been deﬁned using the two previous

group deﬁnitions. The operators “+” and “-” are used to deﬁne these ordered groups in objects called “pin expressions.”

NOTE 4—The Timing block deﬁnes sets of “WaveformTables.” Each WaveformTable deﬁnes the waveforms to be

applied to each signal used in a vector. After the Timing keyword is the quoted string “Hello Tester Timing.” This quoted

string becomes the name of this Timing block. By enclosing the name with double-quotes, characters such as spaces can

be made to be part of the name.

NOTE 5—The ﬁrst statement in a WaveformTable is the period of the test vector to be applied to all signals. All signals

deﬁned in a single WaveformTable must have the same period. In this example, the tester period is 500 ns long.

Each signal may have several different waveforms deﬁned in a single WaveformTable. Each waveform deﬁned for a sig-

nal will be referenced with a single character, called a WaveformChar, or “WFC.” Within each WaveformTable, each sig-

nal’s WaveformChars must be unique across all waveforms deﬁned for the signal. However, different signals may deﬁne

the same WaveformChar for different waveforms.

A waveform needs some explanation. In STIL, a waveform is a series of “time” and “event” pairs. Each pair is deﬁned

with a single STIL statement; these statements are also referred to as “timed events.” The “event” may be a special single

character deﬁned to have a particular operation, or it may be a longer identiﬁer as used in this example. This example

used the events “ForceDown,” “ForceUp,” “ForceOff,” “CompareUnknown,” “CompareHighWindow,” “CompareLow-

Window,” and “CompareOffWindow.” “ForceDown” and “ForceUp” are input or drive events; “ForceDown” forces a

logic low on an input, and “ForceUp” forces a logic high. “ForceOff” forces a logic ﬂoat-state, or turns off any input

drivers. “CompareHighWindow,” “CompareLowWindow,” “CompareOffWindow,” and “CompareUnknown” are output,

or expect, events. “CompareHighWindow” expects a logic high, “CompareLowWindow” expects a logic low, and “Com-

pareOffWindow” expects a logic ﬂoat-state value. To close a window strobe, the event “CompareUnknown” is used.

There are four distinct types of signals in this design. Each has its own waveform to represent the input or output infor-

mation required to test this design.

NOTE 6—The ﬁrst waveform deﬁnition is for the signal DIR. This signal controls the “direction” of the bused signals,

which is ﬁxed in this test. Even though it is ﬁxed, information is deﬁned for signal DIR to allow this signal to be driven

high or driven low at the start of each test cycle. Figure 4 shows graphically the two waveforms deﬁned for this signal

and the STIL syntax.

Because both waveforms have the same timing, they can be merged into a single STIL statement. This shorthand syntax

allows multiple WaveformChars to be deﬁned to the same event in the waveform, with states for each WaveformChar to

apply at that time. The relationship of WaveformChar to event characters is direct: the ﬁrst WaveformChar (in the exam-

ple above, “0”) maps to the ﬁrst waveform event (“ForceDown”), the second (“1”) maps to the second event

(“ForceUp”), and so on for each WaveformChar present. Note that a slash must be present to separate the event refer-

ences when more than one is present.

The signal OE_ has additional events deﬁned to create a pulsed behavior. The merging process for this signal is not as

intuitive as DIR, as the process here requires deﬁning events that do not cause a change of state on the signal. The only

reason to deﬁne these events is to support a single waveform deﬁnition for this signal.

The ABUS signals are deﬁned similarly to DIR, except that they are offset 10 ns into the vector boundary. Note the use

of a Group here to reference a collection of signals to be deﬁned.

The BBUS signals are deﬁned as outputs; at entry to the cycle, any test drivers are explicitly turned off with the

“ForceOff” event. The WaveformChar characters H, L and Z are mapped to the expected states “CompareHighWindow,”

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IEEE

FOR DIGITAL TEST VECTOR DATA Std 1450-1999

“CompareLowWindow,” and “CompareOffWindow,” respectively. The strobe window is opened at 260 ns. At 280 ns, the

strobe is closed with an “CompareUnknown” event.

NOTE 7—STIL supports two styles of comments: “block comments,” which are delimited by a “/*” and “*/”, and “com-

ments to the newline,” which are delimited by a “//” and terminated with a newline. The comments annotating the clos-

ing braces in this example use the style of comments to the newline.

NOTE 8—The PatternBurst block deﬁnes a collection of pattern names to be executed sequentially. (In this example,

there is only one pattern deﬁned.) All patterns deﬁned in a single PatternBurst are executed under a similar context, the

context being deﬁned by the subsequent PatternExec statement. The references to pattern names in this block are one of

the few forward references allowed in STIL; patterns are not deﬁned until the end of the STIL data.

NOTE 9—The PatternExec block deﬁnes how PatternBurst and Timing information is assembled to create the set of

tests to execute. The references in this block to Timing and PatternBurst names must have been deﬁned before this block.

NOTE 10—Finally, the pattern data is deﬁned. Pattern data constitutes the bulk of data in the STIL data set, and is gen-

erally processed one-vector-at-a time. In order to support processing this data as it is read, it is necessary to deﬁne pat-

tern data as the last data in a STIL test environment.

In this example, the ﬁrst statement in the Pattern block is a reference to a WaveformTable; the following vectors (until

another ‘W’ statement) will use the timing deﬁned in the WaveformTable named “one.”

Note that while this pattern contains references to WaveformChars, and to names of WaveformTables, it does not contain

any direct references to the Timing block. This resolution is provided by the PatternExec statement. The PatternExec can

deﬁne references to different Timing blocks; as long as the WaveformChars and WaveformTable names are deﬁned in the

referenced timing set, they can be applied to these same patterns.

Each V statement deﬁnes one test vector. In this example, each Vector deﬁnes the state to be applied to each signal using

the group reference ALL. The declaration order of signals in the group ALL is critical, as the mapping of Waveform-

Chars to signals in the group is performed linearly.

DIR { 01 { ’0ns’ ForceDown/ForceUp; }}

DIR { 0 { ’0ns’ ForceDown; }}

DIR { 1 { ’0ns’ ForceUp; }}

T0 T0

ForceUp at start of vector (at T0)

ForceDown at start of vector (at T0)

500ns

Waveforms to be defined for signal DIR:

STIL syntax to generate these waveforms:

These two STIL statements can be merged

into the single statement:

Figure 4—Waveforms associated with signal DIR

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IEEE

Std 1450-1999 IEEE STANDARD TEST INTERFACE LANGUAGE (STIL)

5.1.1 STIL grammatical constructs

STIL has two basic grammatical constructs for statements in the language. The ﬁrst is a “simple statement,”

featuring a keyword, zero or more other tokens, and terminated by a semicolon. The second is a “block state-

ment,” which again starts with a keyword, may again be followed by zero or more tokens, and then has an

open-brace. After the open-brace, additional STIL language statements may occur. This statement is termi-

nated by a closing brace. These two statement formats are shown in Figure 6.

Figure 6 is intended to represent a simpliﬁcation of the STIL syntax. Some statements, such as the assign-

ment statements in Figure 3 (ALL=0000000000LLLLLLLL), also require the “=” sign to be present.

STIL is a case-sensitive language. All STIL keywords start with an uppercase letter, and some may have

additional uppercase letters inside.

5.1.2 Complexity and language subsets

The previous example of STIL data has been reduced to present the basic language constructs only. As this

tutorial progresses through additional examples, different aspects of the STIL language will be presented.

There are many ways in which digital test information may be developed or provided. Some types of tests

may be more concerned about testing device speciﬁcations. Such tests may not care about how the device

OE_ { 01 {’0ns’ ForceUp;

’200ns’ ForceDown/ForceUp;

’300ns’ ForceUp;}}

OE_ { 0 { ’0ns’ ForceUp; ’200ns’

ForceDown; ’300ns’ ForceUp; }}

OE_ { 1 { ’0ns’ ForceUp; ’200ns’

ForceUp; ’300ns’ ForceUp; }}

Waveforms to be defined for signal OE_:

T0 T0

ForceUp at start of vector

500ns

(ForceUp at 200 ns)

(ForceUp at 300 ns)

ForceUp at start of vector

ForceDown at 200 ns after T0

ForceUp at 300 ns after T0

STIL syntax to generate these waveforms:

The value of the repeated events in the

second waveform only becomes apparent

after the merging of these two statements:

Figure 5—Waveforms associated with the signal OE_

Keyword (OPTIONAL_TOKENS)*;

Keyword (OPTIONAL_TOKENS)* { (OPTIONAL_MORE_STATEMENTS)* }

Simple statement:

Block statement:

Figure 6—STIL statement structure

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